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Full text of "pro-log :: std bus :: 7303 Keyboard Display Card Apr81"

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PRO-LOG 

CORPORATION 



STD 7000 



7303 
Keyboard/Display Card 

USER'S MANUAL 




NOTICE 

The information in this document is provided for reference only. Pro-Log does not assume any liabil ity arising 
out of the application or use of the information or products described herein. 

This document may contain or reference information and products protected by copyrights or patents and 
does not convey any license under the patent rights of Pro-Log, nor the rights of others. 

Printed in U.S.A. Copyright® 1981 by Pro-Log Corporation, Monterey, CA 93940. All rights reserved. However, 
any part of this document may be reproduced with Pro-Log Corporation cited as the source. 



if'iibiii m i'f ih i nn i m w mmmmmtm wifpt i h iii " iii m m i n im 



7303 
KEYBOARD/DISPLAY CARD 

USER'S MANUAL 







Lid, 



PRO-LOG 

CORPORATION 



4/81 



* V i m m i nimi ! ii h iiiii i |i| i|J u M i iMnimuH ii| |i )l H | I 11 1 II III I I MIL I ' r t ' , ' . | |' H"1iWF f^ " ^»WT W" I WV.JH i|' .i ll' l l . .1 1 1| III !! I U III 1 'I I hi " I i ll .i l' 1 1' i ! U I . I I I I H I . 



FOREWORD _ 

\J 

This manual explains how to use Pro-Log's 7303 Keyboard/Display Card. It is structured to reflect the answers 

to basic questions you, the user, might ask yourself about the 7303. We welcome your suggestions on how we 
can improve our instructions. 

The 7303 is part of Pro-Log's Series 7000 STD BUS hardware. Our products are modular, and designed and 
built with second-sourced parts that are industry standards. They provide an industrial manager with the 
means of utilizing his own people to control the design, production, and maintenance of the company's 
products that use STD BUS hardware. 

Pro-Log supports its products with thorough and complete documentation. Also, we teach courses on how to 
design with, and use, microprocessors and the STD BUS products. 

You may find the following Pro-Log documents useful in your work: Microprocessor User's Guide, and the 
Series 7000 STD BUS Technical Manual. If you would like a copy of these documents, please write to us on 
your company letterhead. 



v> 







© 



Vy^V 



Contents 

Page 

Foreword if 

Figures v 

Section 1 - Purpose and Main Features 1-1 

Section 2 - Installation and Specifications 2-1 

I/O Mapped Card Addressing 2-1 

Changing the Port Addresses 2-2 

Alternatives to Soldered Wire Jumpers 2-5 

Electrical and Environmental Specifications 2-5 

Mechanical Specifications 2-7 

Section 3 - Operation and Programming 3-1 

Alphanumeric Display 3-2 

Output Port Bit Assignments for Character Mode 3-4 

Cursor Mode 3-6 

Output Port Bit Assignments for Cursor Mode 3-6 

Keyboard 3-8 

Binary LED Display 3-11 

Rocker Switches 3-11 

Section 4 - Operating Software 4-1 

Introduction 4-1 

Memory Addresses 4-1 

I/O Port Addresses : 4-1 

Software Package Contents 4-2 

Memory Maps 4-4 

ASCI I Display Driver Module 4-9 

Subroutine (DISPLAY) 4-10 

Subroutine (MEM.DISP) 4-11 

Subroutine (STROBE) 4-12 

Cursor Control Module 4-13 

Subroutine (CURSORS) 4-14 

Subroutine (CLR. CURSORS) 4-15 

Display Service Routines Module 4-1 7 

Subroutine (CLEAR.DISPLAY) 4-18 

Subroutine (CLEAR. BOTH) 4-19 

Subroutine (DISPLAY.8) 4-20 

Subroutine (LAMP.TEST) 4-21 



mi 



Contents (continued) 

Hexadecimal/ASCII Conversion Module 4-23 

Subroutine (HEX/ASCII) 4-24 

Subroutine (MEM/ASCII) 4-25 

Subroutine (DISP.HEX) 4-27 

Subroutine (DISP.2.IN.C) 4-28 

Formatted Messages Module 4-29 

Subroutine (MESSAGE) 4-30 

Subroutine (BILLBOARD) 4-31 

Key and Switch Data Entry Module 4-42 

Subroutine (READ.KEY) 4-34 

Subroutine (DECODE.KEY) 4-35 

Subroutine (SCAN) 4-36 

Subroutine (ROCKER.STATUS) 4-37 

Auxiliary Timing Module 4-39 

Subroutine (DISPLAY.DELAY) 4-40 

Subroutine (LONG. DELAY) 4-41 

Subroutine (DEBOUNCE.DELAY) 4-42 

Demonstration/Test Programs 

DISPLAY.DEMO 4-43 

DISPLAY.SELF 4-44 

CALCULATOR 4-45 

DISPLAY.TEST 4-46 

KEY.TEST 4-47 

Coding Forms 4-49 

Section 5 - Maintenance 5-1 

Reference Drawings 5-1 

Signal Glossary 5-4 

Keyboard Label Replacement 5-5 

Keyboard Disassembly 5-5 

Special Parts 5-5 

Return for Repair Procedures 5-5 

Appendix A - Front Panel Mounting of 7303 Card (PLAN 131) A-1 

Introduction , 4 A-2 

Remote 7303 Drive Via I/O Lines A-2 

Panel Mounting A-3 



o 



o 



IV 



Figures 



© 



Figure Page 

1-1 7303 Keyboard/Display Card 1-1 

1-2 Block Diagram of the 7303 Keyboard/Display Card 1-2 

2-1 I/O Mapped Operation in Local Card Rack 2-1 

2-2 Decoder Jumper Pad Numbering for the 7303 2-2 

2-3 7303 I/O Address Decoder and Schematic for 2 Addresses Per Card 2-3 

2-4 Jumpers Required for 7303 Port Address Mapping 2-4 

2-5 Electrical Specifications - 7303 Keyboard/Display Card 2-5 

2-6 STD BUS Electrical Characteristics over Recommended Operating Limits 2-5 

2-7 Edge Connector Pins for the 7303 2-6 

2-8 Switching Characteristics over Recommended Operating Limits - 7303 Card 2-6 

2-9 7303 Alphanumeric Display Timing Waveforms 2-7 

2-10 Mechanical Characteristics over Recommended Operating Limits - 7303 Card 2-7 

3-1 7303 Keyboard/Display 3-1 

3-2 Alphanumeric Display Programming Model for the 7303 3-2 

3-3 Hexadecimal Values of ASCII Characters 3-3 

3-4 Data Port Bit Assignments for Character Mode - 7303 Card 3-4 

3-5 Control Port Bit Assignments for Character Mode - 7303 Card 3-4 

3-6 Display Position Addressing - 7303 Card 3-4 

3-7 Flow Diagram of Character Mode Events for the 7303 3-5 

3-8 Character Mode Timing Waveforms - 7303 Card 3-5 

3-9 Data Port Bit Assignments for Cursor Mode - 7303 Card 3-6 

3-10 Control Port Bit Assignments for Cursor Mode - 7303 Card 3-6 

3-11 Left/Right Display Position Group Select for Cursor Mode - 7303 Card .3-6 

3-12 Flow Diagram of Cursor Mode Events for the 7303 3-7 

3-13 Cursor Mode Timing Waveforms for the 7303 3-7 

3-14 Keyboard Programming Model for the 7303 3-8 

3-15 Programming Key Bounce and Noise Rejection for the 7303 3-9 

3-16 Recommended System-Level Keyboard Procedure for the 7303 3-10 

3-17 Binary LED Display for the 7303 3-11 

3-18 Rocker Switches for the 7303 " 3-1 1 

3-19 Rocker Switch Status for the 7303 3-11 

4-1 Index of Demonstration and Test Programs for the 7303 4-2 

4-2 Index of Keyboard and Display Subroutines for the 7303 4-3 

4-3 16K Memory Map— 7303 Software Package in 7801/7803 

Processor Card Onboard Memory Sockets 4-4 

4-4 256-Byte Memory Map— 7303 Alphanumeric Display Subroutines 4-5 

4-5 256-Byte Memory Map— 7303 Keyboard Subroutines and Demonstration Programs 4-6 

4-6 256-Byte Memory Map— 7303 RAM "MAILBOX" Allocation 4-7 



Figures (continued) 

4-7 Flowchart— ASCII Display Driver Module for the 7303 .4-9 

4-8 Register and Memory Allocation for 7303 Subroutine (DISPLAY) 4-10 

4-9 Characteristics of 7303 Subroutine (DISPLAY) 4-10 

4-10 Register and Memory Allocation for 7303 Subroutine (MEM.DISP) 4-11 

4-11 Characteristics of 7303 Subroutine (MEM.DISP) 4-11 

4-12 Register and Memory Allocation for 7303 Subroutine (STROBE) 4-12 

4-13 Characteristics of 7303 Subroutine (STROBE) 4-12 

4-14 Flowchart—Cursor Control Module for the 7303 4-13 

4-15 Register and Memory Allocation for 7303 Subroutine (CURSORS) 4-14 

4-16 Characteristics of 7303 Subroutine (CURSORS) 4-14 

4-17 Register and Memory Allocation for 7303 Subroutine (CLR.CURSORS) 4-15 

4-18 Characteristics of 7303 Subroutine (CLR.CURSORS) 4-15 

4-19 Flowchart— Display Service Module for the 7303. 4-17 

4-20 Register and Memory Allocation for 7303 Subroutine (CLEAR. DISPLAY) 4-18 

4-21 Characteristics of 7303 Subroutine (CLEAR.DISPLAY) 4-18 

4-22 Register and Memory Allocation for 7303 Subroutine (CLEAR. BOTH) 4-19 

4-23 Characteristics of 7303 Subroutine (CLEAR. BOTH) 4-19 

4-24 Register and Memory Allocation for 7303 Subroutine (DISPLAY .8) 4-20 

4-25 Characteristics of 7303 Subroutine (DISPLAY.8) 4-20 

4-26 Register and Memory Allocation for 7303 Subroutine (LAMP.TEST) 4-21 

4-27 Characteristics of 7303 Subroutine (LAMP.TEST) 4-21 

4-28 Flowchart— Hexadecimal/ ASCI I Conversion Module for the 7303 4-23 

4-29 Register and Memory Allocation for 7303 Subroutine (HEX/ ASCII) 4-24 

4-30 Characteristics of 7303 Subroutine (HEX/ASCII) 4-24 

4-31 Register and Memory Allocation for 7303 Subroutine (MEM/ ASCI I) 4-25 

4-32 Characteristics of 7303 Subroutine (MEM/ ASCI I) 4-26 

4-33 Register and Memory Allocation for 7303 Subroutine (DISP.HEX) 4-27 

4-34 Characteristics of 7303 Subroutine (DISP.HEX) 4-27 

4-35 Register and Memory Allocation for 7303 Subroutine (DISP.2.IN.C) 4-28 

4-36 Characteristics of 7303 Subroutine (DISP.2.IN.C) 4-28 

4-37 Flowchart— Formatted Messages Module for the 7303 4-29 

4-38 Register and Memory Allocation for 7303 Subroutine (MESSAGE) 4-30 

4-39 Characteristics of 7303 Subroutine (MESSAGE) 4-30 

4-40 Register and Memory Allocation for 7303 Subroutine (BILLBOARD) 4-31 

4-41 Characteristics of 7303 Subroutine (BILLBOARD) 4-31 

4-42 Flowchart— Key and Switch Data Entry Module for the 7303 4-33 

4-43 Register and Memory Allocation for 7303 Subroutine (READ. KEY) 4-34 

4-44 Characteristics of 7303 Subroutine (READ.KEY) 4-34 

4-45 Register and Memory Allocation for 7303 Subroutine (SCAN) ........4-36 

4-46 Characteristics of 7303 Subroutine (SCAN) 4-36 

4-47 Register and Memory Allocation for 7303 Subroutine (ROCKER.STATUS) 4-37 

vi 



o 



o 



o 



o 



Figures (continued) 

4-48 Characteristics of 7303 Subroutine (ROCKER.STATUS) 4-37 

4-49 Flowchart— Auxiliary Timing Module for the 7303 4-39 

4-50 Register and Memory Allocation for 7303 Subroutine (DISPLAY.DELAY) 4-40 

4-51 Characteristics of 7303 Subroutine (DISPLAY.DELAY) 4-40 

4-52 Register and Memory Allocation for 7303 Subroutine (LONG. DELAY) 4-41 

4-53 Characteristics of 7303 Subroutine (LONG. DELAY) 4-41 

4-54 Register and Memory Allocation for 7303 Subroutine (DEBOUNCE.DELAY) 4-42 

4-55 Characteristics of 7303 Subroutine (DEBOUNCE.DELAY) 4-42 

4-56 Flowchart— DISPLAY.DEMO Demonstration/Test Program for the 7303 4-43 

4-57 Flowchart— DISPLAY.SELF Demonstration/Test Program for the 7303 4-44 

4-58 Flowchart— CALCULATOR Demonstration/Test Program for the 7303 4-45 

4-59 Flowchart— DISPLAY.TEST Demonstration/Test Program for the 7303 4-46 

4-60 Flowchart— KEY.TEST Demonstration/Test Program for the 7303 4-47 

5-1 Schematic for 7303 (reference only) 5-2 

5-2 Assembly for 7303 (reference only) a 5-3 

5-3 STD BUS Edge Connector Signals for the 7303 5-4 

5-4 Internal 7303 Signals 5-4 

5-5 Special Parts for 7303 5-5 

A-1 Cable Connection when Operating the 7303 as an I/O Load A-2 

A-2 Cutout Details of 7303 Panel-Mounting A-3 

A-3 Profile Mounting of 7303 in User's 1/8-in. Panel A-4 



VII 



o 



o 



o 



SECTION 1 
Purpose and Main Features 



The 7303 is a general purpose, control panel card with data input and display capability (Fig. 1-1). It includes 
an 8-position alphanumeric display keyboard with 24 program-definable keys plus system reset, an 8-bit 
binary LED display, and two rocker switches. (See Fig. 1-2 for the block diagram.) 

You can use the 7303 in applications where you need a low cost interface for system control, data entry, status 
display, and operator prompting. Also, the card is useful for system development, testing, and training 
applications. 

The 7303 can be mounted in the first position in a card cage with an open-end panel, on a card extender such 
as the 7901, or on a 1/8-in. thick panel. 

Main Features of the 7303 are: 

• 8-position alphanumeric display with ASCII input 

• 24 programmable keys plus reset 

• Repairable keyboard and replaceable key labels 

• 8-bit binary LED display 

• 2 rocker switches 

• Simple program control of displays and keys 

• On-card I/O ports for processor control 

• Single +5V Operation 



o 




Figure 1-1. 7303 Keyboard/Display Card. 



1-1 



IV> 



DATA BUS 
D7 - DO 



IOEXP- 




IORQ* 
RD* 
WR* 



SYSRESET* 



PBRESET* 



I/O 

CONTROL 

LOGIC 

& 

BUFFERS 



SW2 




*Active low level logic 



^ 



+. 



-h 



-k 



ROCKER 
SWITCHES 



SW1 



-Z 



CONTROL 

PORT 
LATCHES 



DATA 

PORT 

LATCHES 



-k 



+ 



CONTROL 
DATA 



EIGHT-CHARACTER 

ALPHANUMERIC 

DISPLAY 



-k 



f f f f f.f f t 


A A A A A A A A 


EIGHT INDICATORS 



.z 



I 



COLUMN SELECT 



14 


15 


16 


17 


Ire. 
[set 


c 





E 


F 


13 


e 


9 


A 


B 


12 


4 


5 


6 


7 


11 





1 


2 


3 


10 



KEYBOARD 
MATRIX 



ROW READ 



RESET KEY 



/« 



Figure 1-2. Btock Diagram of the 7303 Keyboard/Display Card. 



SECTION 2 
Installation and Specifications 



o 



o 



The 7303 operates as part of an STD BUS card rack system. You can plug it directly into the STD BUS 
backplane (Fig. 2-1) or extend it from the motherboard with a 7901 card extender, or equivalent. In this 
configuration, the card is mapped at processor I/O port addresses. 

Insert the card in the left-most socket (viewed from the card ejector end of the rack) of a card cage that has the 
left end plate open. 

Insert a 7901 card extender in any card slot and plug the 7303 into the card extender. In this position, the 7303 
clears the other cards and is accessible. 

If you mount the 7303 remotely from the card rack, you will need buffering between the card rack and the 7303. 
A suitable method is to operate the card as an I/O load driven by input and output ports, rather than as an I/O 
mapped processor-backplane load. For more information, see Pro-Log's Application Note PLAN 131 
(Appendix A). 

I/O Mapped Card Addressing 

In its normal operation, the 7303 is addressed directly by the processor card. The 7303's input and output ports 
respond to single read and write instructions executed in the processor's operating program. The 7303 is 
enabled when a jumper-selected combination of address lines A0 through A7 is present, and when the 
following control lines are active: IORQ*, IOEXP, and either RD* or WR*. 

The 7303 occupies two consecutive I/O addresses regardless of its mapping assignment. The card is shipped 
with the control port mapped at D1 and the data port mapped at DO. You may retain these addresses or change 
them by moving the installed jumper wires. By using DO and D1 , the preferred addresses, you can easily adapt 
standard Pro-Log software. While the card's port addresses are generally arbitrary, they must differ from all 
other I/O port addresses in the system. If they do not differ, multiple cards will respond to the same READ 
instruction, resulting in BUS contention. 



7800 SERIES 
CPU CARD 



STD BUS 




7303 

KEYBOARD/DISPLAY 

CARD 



Figure 2-1. I/O Mapped Operation in Local Card Rack. 



2-1 



Changing the Port Addresses 

Locate decoders U3, U4, and U5 (74LS42) next to the STD BUS edge connector. Each decoder device has a 
dual row of pads that form decoder output select matrices. Make one (and only one) connection to each of the 
matrices next to U3 and U4, and two connections next to U5. 

The decoder pad numbering (Fig. 2-2) shows the numbering of the pads next to the decoder chips on the 7303. 
Also shown are the jumpers (at X6, Y4, Z0, Z1) that produce the hexadecimal port address DO and D1, the 
selection made when the card is shipped. 

The I/O address mapping and jumper selection for two addresses per card is shown in Figs. 2-3 and 2-4. It 
indicates where to place jumper straps to obtain any port address in the 00-FF hexadecimal range. Using the 2- 
digit hexadecimal port addresses desired, find the hexadecimal port addresses along the vertical axis, and 
read the corresponding strap positions from Fig. 2-4. For example, port address DO and D1 are obtained by 
connecting jumpers at X6, Y4, Z0, and Z1 . This is the preferred address and is shown on the table by the shaded 
area. 



o 



O 



O 



P 



[QC4Q] 



nnn nnnnaa 



U1 
74LS244 



u u u u u 



nnn nonnnrt 



U2 
74LS240 



n n n n a 



U3 
74LS42 

u u u o u u tf 



oooooo 



oogo 

ooflo 



oooo 

12 3 4 5 6 7 
n n n— n n n 3% 



O 
o 
O 

nfn 
sx 



U4 
74LS42 



l) V u U U V u 



ooo 



oooogoo 
0000O000 

12 3 4 5 6 7 



SY 



A 






n 


c\ 


' 




U5 
74LS42 




9 
8 


^ 











)00 

Soo 



sz 



n n n o,„n,ci 



U6 

74LS32 

„ „, , v u , u L 



nnnnnnnnn 



U7 
74LS244 



u o o tr-g 



O 



Figure 2-2. Decoder Pad Numbering for the 7303. 



o 



2-2 



CARD SELECT DECODERS 



O 




02 O 

3^ d 

D* O 

^ O 

^ 

y* o 

02 o 

& 



O sx^ 



0= o 

o* o 

o* o 

^ 6 

D* O 

^ o 

^2 o 

^ o 



O O syA 



<fy> 




Figure 2-3. 7303 I/O Address Decoder and Schematic for 2 Addresses Per Card 

(shown mapped at DO and D1, the preferred card address). 



2-3 



tfBIHHUgJ ' MUMWU' l HAUM 



PORTS 



00 



01 



02 



03 



04 



05 



06 



07 



08 



09 



0A 



OB 



OC 



OD 



OE 



OF 



10 



11 



12 



13 



14 



15 



16 



17 



18 



19 



1A 



1B 



1C 



1D 



1E 



1F 



20 



21 



22 



23 



24 



25 



26 



27 



28 



29 



2A 



2B 



2C 



2D 



2E 



2F 



30 



31 



32 



33 



34 



35 



36 



37 



38 



39 



3A 



3B 



3C 



3D 



3E 



3F 



JUMPER WIRES 



XO 



xo 



XO 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



xo 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



X1 



YO, ZO, Z1 - 



YO, Z2, Z3 - 



Y1, ZO, ZI- 



YI, Z2, Z3- 



Y2, ZO, Z1 - 



Y2, Z2, Z3 



Y3, ZO, Z1 - 



Y3, Z2, Z3 



Y4, ZO, Z1 



Y4, Z2, Z3 



Y5, ZO, Z1 



Y5, Z2, Z3 



Y6, ZO, Z1 



Y6, Z2, Z3- 



Y7, ZO, Z1 



Y7, Z2 t Z3- 



YO, Z0.Z1- 



YO, Z2, Z3 - 



Y1.Z0, Z1 - 



Y1, Z2, Z3- 



Y2, ZO, Z1 - 



Y2, Z2 f Z3 



Y3, ZO, Z1 



Y3, Z2, Z3 



Y4, Z0.Z1- 



Y4 f Z2, Z3 - 



Y5, ZO, Z1 - 



Y5, Z2, Z3 - 



Y6, ZO, Z1 - 



Y6, Z2, Z3 - 



Y7, ZO, Z1 - 



Y7, Z2, Z3- 



PORTS 



40 



41 



42 



43 



44 



45 



46 



47 



48 



49 



4A 



4B 



4C 



4D 



4E 



4F 



50 



51 



52 



53 



54 



55 



56 



57 



58 



59 



5A 



5B 



5C 



5D 



5E 



5F 



60 



61 



62 



63 



64 



65 



66 



67 



68 



6A 



6B 



6C 



6D 



6E 



6F 



70 



71 



72 



73 



74 



75 



76 



77 



78 



79 



7A 



7B 



7C 



7D 



7E 



7F 



JUMPER WIRES 



■ X2, YO, ZO, Z1- 



X2, YO, Z2, Z3- 



X2, Y1..Z0, Z1- 



X2, Y1, Z2, Z3- 



X2, Y2.Z0, Z1- 



•X2, Y2, Z2, Z3- 



X2, Y3, ZO, Z1- 



•X2, Y3, Z2, Z3- 



X2, Y4, ZO, Z1- 



X2, Y4, Z2. Z3- 



X2, Y5, ZO, Z1 



■X2, Y5, Z2, Z3- 



X2, Y6, ZO, Z1 



X2, Y6..Z2, Z3- 



X2, Y7, ZO, Z1- 



X2, Y7.Z2, Z3- 



X3, YO, ZO, Z1 



X3, YO, Z2, Z3- 



X3, Y1, ZO, Z1 



X3, Y1,Z2, Z3- 



X3, Y2, ZO, Z1- 



X3, Y2, Z2, Z3- 



X3, Y3, ZO, Z1 • 



X3, Y3, Z2, Z3- 



X3, Y4, ZO, Z1 - 



X3, Y4, Z2, Z3- 



X3, Y5, ZO, Z1 



X3, Y5, Z2, Z3- 



X3, Y6, ZO, Z1 - 



X3, Y6, Z2, Z3- 



X3, Y7, ZO, Z1 ■ 



X3, Y7,Z2, Z3- 



PORTS 



JUMPER WIRES 



80 



81 



82 



83 



84 



85 



86 



87 



88 



89 



8A 



8B 



8C 



8D 



8E 



8F 



90 



91 



92 



93 



94 



95 



96 



97 



98 



99 



9A 



9B 



9C 



9D 



9E 



9F 



AO 



A1 



A2 



A3 



A4 



A5 



A6 



A7 



A8 



A9 



AA 



AB 



AC 



AD 



AE 



AF 



BO 



B1 



B2 



B3 



B4 



B5 



B6 



B7 



B8 



B9 



BA 



BB 



BC 



BD 



BE 



BF 



X4, YO, ZO, Z1 ■ 



X4, YO, Z2.Z3- 



X4, Y1, ZO, Z1- 



X4, Y1, Z2, Z3- 



X4, Y2, ZO, Z1 - 



X4, Y2, Z2, Z3- 



X4, Y3, ZO, Z1 - 



X4, Y3, Z2, Z3- 



X4, Y4, ZO, Z1 - 



X4, Y4, Z2, Z3- 



X4, Y5, ZO, Z1 



X4, Y5, Z2, Z3- 



X4, Y6, ZO, Z1 



X4, Y6, Z2, Z3- 



X4, Y7, ZO, Z1- 



X4, Y7, Z2, Z3- 



X5, YO, ZO, Z1 - 



X5, YO, Z2, Z3 



X5, Y1, ZO, Z1- 



X5, Y1, Z2, Z3- 



X5, Y2, ZO, Z1- 



X5, Y2, Z2, Z3- 



X5, Y3, ZO, Z1 - 



X5, Y3, Z2, Z3- 



X5, Y4, ZO, Z1 



X5, Y4, Z2, Z3- 



X5, Y5, ZO, Z1 



X5, Y5, Z2 ( Z3- 



X5, Y6, ZO, Z1 . 



X5, Y6, Z2, Z3- 



X5, Y7, ZO, Z1- 



X5, Y7, Z2, Z3 



PORTS 



JUMPER WIRES 



CO 



C1 



C2 



C3 



C4 



C5 



C6 



C7 



C8 



C9 



CA 



CB 



CC 



CD 



CE 



CF 



DO 



D1 



D2 



D3 



D4 



D5 



D6 



D7 



D8 



D9 



DA 



DB 



DC 



DD 



DE 



DF 



EO 



E1 



E2 



E3 



E4 



E5 



E6 



E7 



E8 



E9 



EA 



EB 



EC 



ED 



EE 



EF 



FO 



F1 



F2 



F3 



F4 



F5 



F6 



F7 



F8 



F9 



FA 



FB 



FC 



FD 



FE 



FF 



X6, YO, ZO, Z1- 



X6, YO, Z2, Z3- 



X6, Y1, ZO, Z1- 



X6, Y1,Z2, Z3- 



X6, Y2, ZO, Z1- 



X6, Y2, Z2, Z3- 



X6, Y3, ZO, Z1- 



X6, Y3, Z2, Z3- 



IliiiSiBB 



X6, Y4, Z2, Z3- 



X6, Y5, ZO, Z1- 



X6, Y5, Z2, Z3- 



X6, Y6, ZO, Z1- 



X6, Y6, Z2, Z3- 



X6, Y7, ZO, Z1- 



X6, Y7, Z2, Z3- 



X7, YO, ZO, Z1- 



X7, YO, Z2, Z3- 



X7, Y1,Z0, Z1- 



X7, Y1, Z2, Z3- 



X7, Y2, ZO, Z1- 



X7, Y2, Z2, Z3- 



X7, Y3, ZO, Z1- 



X7, Y3, Z2, Z3- 



X7, Y4, ZO, Z1- 



X7, Y4, Z2, Z3- 



X7, Y5, ZO, Z1- 



X7, Y5, Z2, Z3- 



X7, Y6, ZO, Z1- 



X7, Y6 ( Z2, Z3- 



X7, Y7, ZO, Z1- 



X7, Y7, Z2, Z3- 



Shading denotes as-shipped configuration. 
Figure 2-4. Jumpers Required for 7303 Port Address Mapping. 



o 



2-4 






The jumpers installed at the time of manufacture may be removed and installed at different locations, imple- 
menting different port addresses. The preferred method of removing jumpers that have been soldered to the 
board is to first cut the jumper in half, then unsolder each half individually and discard. Remaining solder 
should then be removed from the holesand new jumpers installed at the appropriate locations. 



NOTE 

On some early 7303 cards, circuit traces were used instead of wire jumpers to implement ports DO and 
D1 . In such cases, cut the jumper trace and remove it from the board with a sharp knife, taking care not 
to damage the board or any other traces; then proceed to install the new jumper(s). 



o 



Alternatives to Soldered Wire Jumpers 

If occasional or frequent changes in address mapping jumpers are anticipated, remove the wire jumpers and 
populate the jumper pads with 0.025-in. square posts, which are availableJndividually and in single and double 
strips corresponding to the 0.100-in. grid jumper pad spacing on the card. The posts may then be connected by 
wirewrap or by jumper clips available from several sources. Check the height above the board that these parts 
may protrude, in order to avoid interference with adjacent cards. The recommended wirewrap square post for 
SX and SY is AMP No. 87215-5, or equivalent. For SZ, it is AMP No. 87215-1 , or equivalent. The recommended 
jump clip is AMP No. 530153-2, or equivalent. 



Electrical and Environmental Specifications 



SYMBOL 


PARAMETER 


RECOMMENDED OPERATING LIMITS 


ABSOLUTE NONOPERATING LIMITS 


MIN 


TYP 


MAX 


MIN 


MAX 


UNIT 


Vcc 


Supply voltage 


4.75 


5.00 


5.25 


0.0 


5.50 


V 


T A 


Free air temperature 





25 


55 





55 


°c 


R H 


Humidity a 


5 




95 





95 


%RH 



Noncondensing. 



Figure 2-5. Electrical Specifications - 7303 Keyboard/Display Card. 



SYMBOL 


PARAMETER 


MIN 


TYP 


MAX 


UNIT 


Ice 


STD BUS supply current 8 




300 


500 


mA 


— 


STD BUS input load 


See 


Fig. 2-7 


See Fig. 2-7 


— 


STD BUS output drive 


See Fig. 2-7 
i 


See Fig. 2-7 



All segments driven. 

Figure 2-6. STD BUS Electrical Characteristics over Recommended Operating Limits. 



2-5 



PIN NUMBER 






PIN NUMBER 


OUTPUT (LSTTL DRIVE) 






OUTPUT (LSTTL DRIVE) 


INPUT (LSTTL LOADS 


> 






INPUT (LSTTL LOADS) 


MNEMONIC 




MNEMONIC 


+5V 


vcc 




2 


1 




VCC 


+5V 


GROUND 


GND 




4 


3 




GND 


GROUND 


-5V 






6 


5 






-5V 


D7 


1 


55 


8 


7 


55 




D3 


D6 


1 


55 


10 


9 


55 




D2 


D5 


1 


55 


12 


11 


55 




D1 


D4 


1 


55 


14 


13 


55 




DO 


A15 






16 


15 






A7 


A14 






18 


17 






A6 


A13 






20 


19 






A5 


A12 






22 


21 






A4 


A11 






24 


23 






A3 


A10 






26 


25 






A2 


A9 






28 


27 






A1 


A8 






30 


29 






A0 


RD* 


1 




32 


31 






WR* 


MEMRQ* 






34 


33 






IORQ* 


MEMEX 






36 


35 






IOEXP 


MCSYNC* 






38 


37 






REFRESH* 


STATUS 0* 






40 


39 






STATUS 1* 


BUSRQ* 






42 


41 






BUSAK* 


INTRQ* 






44 


43 






INTAK* 


NMIRQ* 






46 


45 






WAITRQ* 


PBRESET* 




OUT 


48 


47 




1 


SYSRESET* 


CNTRL* 






50 


49 






CLOCK* 


PCI 


IN 




52 


51 


OUT 




PCO 


AUX GND 






54 


53 






AUX GND 


AUX-V 






56 


55 






AUX +V 



o 



o 



* Active low-level logic 

Figure 2-7. Edge Connector Pins for the 7303. 

Figure 2-8 shows the timing requirements that must be observed by the 7303's operating software. T B1 and T B2 
define the uncertainty period for input port data after a mechanical key or switch opens or closes. Figure 2-9 
defines the other data parameters listed below. 



SYMBOL 


PARAMETER 


FROM 


TO 


MIN 


MAX 


UNIT 


<B1 


Key bounce 


Key depressed or 
released 


Key data stable 




15 


ms 


»B2 


Rocker bounce 


Switch closed or 
opened 


Switch data stable 




15 


ms 


tsi 


Data setup 


ASCII data 


Position pulse 


1.2 




/US 


«S2 


Write setup 


Position address 


Write pulse 


0.6 




MS 


«W 


Write width 


Write pulse active 


Write pulse inactive 


1.1 




MS 


*H 


Write hold 


Write pulse 


Invalid data 
address 


0.5 




MS 



2-6 



Figure 2-8. Switching Characteristics over Recommended Operating Limits— 7303 Card. 



o 



DATA 




ASCII CHARACTER VALID 



DISPLAY POSITION 
ADDRESS VALID 

WRITE ACTIVE 



t w 




Figure 2-9. 7303 Alphanumeric Display Timing Waveforms. 

(Note: Waveforms illustrate program values. WRITE is low level active in hardware.) 

Mechanical Specifications 

The 7303's storage and nonoperating temperature range is limited to to 55°C. 

The 7303 meets all general mechanical specifications of the STD BUS except for component height, which is 
0.95 in. (2.14 cm) maximum. If you use the 7303 as an interface card, install it in one of two ways that allow you 
access to the component side of the card, utilizing a single slot in the card rack. 



o 



SYMBOL 


PARAMETER 


MIN 


TYP 


MAX 


UNIT 


— 


Key life expectancy 


3x106 






Operations 


— 


Component height 






0.95 


in. 



Figure 2-10. Mechanical Characteristics over Recommended Operating Limits— 7303 Card. 



2-7 



o 



o 



o 



2-8 



SECTION 3 
Operation and Programming 



The 7303, as a general-purpose control panel card, operates as part of the STD BUS card rack system. You 
can use the 7303 for system control, data entry, status display, and operator prompting in low-cost interface 
applications. The 7303 can also be used for system development, testing, and training. 

The 7303's operator interface consists of an 8-position alphanumeric display; 24 program-definable keys plus 
a fixed-function reset key that resets the systems's processor card; an 8-bit binary LED display; and two 
rocker switches. This section shows how each of these elements works and how they are programmed. Actual 
program examples are found in Section 4. 

Figure 3-1 shows the physical layout of the 7303's switches and indicators. It also shows the display position 
numbers (7-0), the numeric values of the keys in hexadecimal (0-17), and the rocker switch numbers (S1 and 
S2). These designations are important when programming the 7303, and you will probably want to refer back 
to Fig. 3-1 while reading the rest of this section. 



-ALPHANUMERIC DISPLAY 



LEFT 



LEFT HALF 



RIGHT HALF 



RIGHT 



S2 



o 



ROCKER 
SWITCH 



7 6 5 4 3 2 1 

• ••••••• 

LED DISPLAY 



S1 



ROCKER 
SWITCH 



14 




15 


16 




17 




RE- 
SET 
















C 




D 


E 




F 




13 
















8 




9 


A 




B 




12 
















4 




5 


6 




7 




11 





















1 


2 




3 




10 



KEYBOARD - 



Figure 3-1. 7303 Keyboard/Display. 



3-1 



Alphanumeric Display 

The display consists of eight, 16-segment alphanumeric positions. Each position displays any character from 
the 64-character ASCII set. It can also display a cursor character (all segments on). Each display position has 
an ASCII character memory and a separate cursor memory. These separate memories allow the cursor to be 
displayed and removed without altering the ASCII character memory. Each display position is randomly 
addressable. 

Two onboard output ports drive the display (Fig. 3-2). The display's operation is controlled by program 
manipulation of the output bits from these ports. The ports provide the display with data, addressing, and 
control signals, giving the program random access to any of the eight display positions. 

You can program each display position in either of two modes: character or cursor. By flashing the cursor (all 
segments on) alternately with another character, you can draw attention to one or more of the display 
positions. Also, you can use the cursor as a lamp test. The display can have any combination of characters and 
cursors present. 

In the character display mode, you can load each display position with any of the characters shown in Fig. 3-3. 
Use the SPACE character to blank the position. Note that the display uses 7-bit ASCII code. Each display 
position has its own ASCII character memory, ASCII-to-16-segment decoder, and lamp drivers. 

In the cursor display mode, each display position can show the cursor character, and each position has a 
separate cursor memory in addition to its character memory. Since setting the cursor-on memory bit does not 
alter the content of the ASCII character memory, you can flash the cursor and an ASCII character alternately 
by setting and clearing the cursor memory. 

The functions of the two onboard output ports differ between character display mode and cursor display mode 
(including display clearing). We discuss these two modes separately; also we provide separate subroutine 
modules for the 7303's alphanumeric display operation in each mode (see Section 4). 



o 



o 



LEFT HALF 



RIGHT HALF 



WR 



POSITION MODE 
SELECT SELECT 



ASCII 
INPUT 



CONTROL PORT 
d7 



^ 



dO 



OUTPUT 

PORT 

ADDRESS 

D1 



-WR 



-p 




-A2- 
-A1- 
-A0- 



DATA PORT 



d7 



I 



dO 



OUTPUT 

PORT 

ADDRESS 

DO 



zm/ 



MODE 



^ 



b6 



bO 



d0-d7 / 8 



^ 



Figure 3-2. Alphanumeric Display Programming Model for the 7303. 



o 



3-2 



ASCII 


HEX 


CHAR 


CODE 


SPACE 


AO 


! 


A1 


»J 


A2 


# 


A3 


$ 


A4 


% 


A5 


& 


A6 


9 


A7 


( 


A8 


) 


A9 


* 


AA 


+ 


AB 


5 


AC 


- 


AD 


. 


AE 


/ 


AF 



ASCII 


HEX 


CHAR 


CODE 





BO 


1 


B1 


2 


B2 


3 


B3 


4 


B4 


5 


B5 


6 


B6 


7 


B7 


8 


B8 


9 


B9 


; 


BA 


> 


BB 


< 


BC 


= 


BD 


> 


BE 


? 


BF 



ASCII 


HEX 


CHAR 


CODE 


@ 


CO 


A 


C1 


B 


C2 


C 


C3 


D 


C4 


E 


C5 


F 


C6 


G 


C7 


H 


C8 


1 


C9 


J 


CA 


K 


CB 


L 


CC 


M 


CD 


N 


CE 





CF 



ASCII 


HEX 


CHAR 


CODE 


P 


DO 


Q 


D1 


R 


D2 


S 


D3 


T 


D4 


U 


D5 


V 


D6 


w 


D7 


X 


D8 


Y 


D9 


z 


DA 


[ 


DB 


\ 


DC 


] 


DD 


/\ 


DE 


— (Note) 


DF 



Note: Underscore. 



Figure 3-3. Hexadecimal Values of ASCII Characters. 



o 



Initialization: Reset Characteristics. The 7303's SYSRESET* input clears its output ports but does not clear 
the alphanumeric display or its character and cursor memories. If SYSRESET* occurs while the program is 
changing the content of the alphanumeric display, the content may be altered unpredictably. Therefore, make 
sure you restore or clear the alphanumeric display after a system reset. 

Also, after power-on, the display's content is unpredictable. So initialization by a programmed instruction 
sequence is generally needed soon after power-on. To blank the display, load the SPACE character (ASCII 
/hexadecimal AO) in each display position. Note that a separate instruction sequence is required to clear the 
cursors. 

ASCII Character Set. The 7303 can display 64 different characters. These characters, and the hexadecimal 
code to produce each one, are given in Fig. 3-3. 

To use this figure, identify the character you wish displayed. The code to the right of the character is a two-digit 
hexadecimal number that uniquely identifies the character. For the 64 characters that the 7303 can display, the 
codes range from AO through DF. For example: the hexadecimal code for the SPACE character is AO, for the 
number 3 it is B3, and for the letter M it is CD. 

The use of hexadecimal codes not listed in the figure results in either a blanked display position (if bit 7 of the 
code is 1), or undefined cursor activity (if bit 7 is 0). 



NOTE on Port Addresses 

Section 2 shows how you can remap the 7303's address decoders to allow the card to occupy any 
two consecutive port addresses in the 00-FF hexadecimal range. 

The 7303 is shipped with port addresses DO and D1 selected by jumper wires, and all of the 
explanation of the card's operation and programming in this section assumes that these addresses 
remain connected. 

If you elect to remap the 7303, regard the onboard ports as the Data Port and the Control Port (ports 
DO and D1, respectively). 



3-3 



jl ill lB I JU II MJ I I I Il ll l l l ll l ll H I 



Output Port Bit Assignments for Character Mode 

Data Port. Output port DO selects character mode (bit 7 = 1) and specifies one of the 64 ASCI I characters to be 
displayed in bits 0-6. Figure 3-4 shows the bit assignments in the data port for character mode. 



DATA BUS 


MNEM 


DESCRIPTION 


d7 


MODE 


1 = Character mode 


d6 


b6 


MSB 


d5 


b5 


A 


d4 


b4 


d3 


b3 


7-bit ASCII character 


d2 


b2 


\r 


d1 


b1 


dO 


bO 


LSB 



Note: Standard data port address is HEX DO. 
Figure 3-4. Data Port Bit Assignments for Character Mode— 7303 Card. 

Control Port. Output Port D1 selects the alphanumeric display position address (bits 2, 1, 0) and enables the 
display's WRITE function as shown in Fig. 3-5. 



DATA BUS 


MNEM 


DESCRIPTION 


d7 


X 


Don't care 


d6 


X 


d5 


X 


d4 


X 


d3 


WR 


1 = Write, = Write inhibit 


d2 


A2 


Display position address 0-7 
See Fig. 3-6 


d1 


A1 


dO 


A0 



o 



o 



Note: Standard control port address is HEX D1. 
Figure 3-5. Control Port Bit Assignments for Character Mode— 7303 Card. 



Figure 3-6 shows the bit patterns required in the control port's bits 2, 1 , to address the eight alphanumeric 
display positions 0-7. 



DATA BUS 


MNEM 


DISPLAY POSITION 


7 


6 


5 


4 


3 


2 


1 





d2 


A2 


1 


1 


1 


1 














d1 


A1 


1 


1 








1 


1 








dO 


A0 


1 





1 





1 




I 


1 






Figure 3-6. Display Position Addressing— 7303 Card. 



o 



3-4 



Programming in the Character Display Mode. Causing one of the ASCII characters to appear in one of the 
7303's display positions requires four steps in the program. These four steps can be summarized as follows: 

1 . Output the hexadecimal value of the ASCI I character to be displayed (Fig. 3-3) to the 7303's data 
port (Fig. 3-4). 

2. Output the 3-bit address of the display position the character is to occupy (7-0) with the write 
bit = to the control port (Fig. 3-5). 

3. Repeat step 2, but set the write bit = 1. 

4. Repeat step 2 (write bit returns to zero, protecting the display). 

These steps are summarized as a flow diagram and resulting waveforms in Figs. 3-7 and 3-8 below. 



O 





(display ascim 






STEP 1 


WRITE CHAR- 
ACTER CODE TO 
DATA PORT 








STEP 2 


WRITE POSITION 
ADDRESS WITH 

WR=0TO 
CONTROL PORT 








STEP 3 


WRITE POSITION 
ADDRESS WITH 

WR = 1TO 
CONTROL PORT 








STEP 4 


WRITE POSITION 
ADDRESS WITH 

WR=0TO 
CONTROL PORT 








( FINISHED J 



Find program values in Fig. 3-3. 





DISPLAY POSITION 




PROGRAM STEP 


7 


6 


5 


4 


3 


2 


1 





COMMENT 


Step 2 


07 


06 


05 


04 


03 


02 


01 


00 


Write = 


Step 3 


OF 


0E 


0D 


OC 


0B 


0A 


09 


08 


Write = 1 


Step 4 


07 


06 


05 


04 


03 


02 


01 


00 


Write = 



Program Values for Steps 2, 3, 4. 



Figure 3-7. Flow Diagram of Character Mode Events for the 7303. 



STEP 1 



DAI 
POI 




I 






rA 

\j b0-b6 


X 


CHARACTER CODE VALID \S 




I 


STEP 2 

I 


STEP 3 STEP 4 

i i 

i i 




r A2,A1,A0 
^ WRITE 




zx: 

i 

i 
i 


POSITION ADDRESS VALID N<^ 


CONTROL 
PORT 


■ l 
J WR 1 ' 




WRoX ACT,VE XWRO 



Figure 3-8. Character Mode Timing Waveforms for the 7303. 

(Note: Waveforms illustrate program values. WR is low active in hardware.) 



3-5 



tmw ii .Mm i M i i wwiHfwwiwwiwt 



wmmmmimmimmmmm 



Cursor Mode 

Once a valid ASCII character is loaded into the display position's ASCI I memory, the position can display the 
cursor character. Note that ASCII characters must be displayed before the cursor can be displayed; the 
SPACE character satisfies this requirement. 

Output Port Bit Assignments for Cursor Mode 

Cursor mode and character mode share the same output ports, but the bit functions differ between the two 
modes. 

Data port. Output port DO selects cursor mode (bit 7 = 0). Bits 0, 1,2,3 specify the cursor on/off state for four 
display positions at a time. Either the right half of the displays (positions 0, 1 , 2, 3) or the left-half of the displays 
(positions 4, 5, 6, 7) can be addressed in one operation. Figure 3-9 shows the data port bit assignments for 
cursor mode. 



o 



DATA BUS 


MNEM 


DESCRIPTION 


d7 


MODE 


= Cursor mode 


d6 


b6 


Don't care 


d5 


b5 


<J4 


b4 


d3 


b3 


Cursor enable, positions 3 and 7 


d2 


b2 


Cursor enable, positions 2 and 6 


d1 


b1 


Cursor enable, positions 1 and 5 


dO 


bO 


Cursor enable, positions and 4 



Set bit = 1 to 
display cursor. 

Reset bit = to 
remove cursor. 



Note: Standard data port address is HEX DO. 

Figure 3-9. Data Port Bit Assignments for Cursor Mode— 7303 Card. 



o 



Control Port. Output port D1 controls the display's WRITE function (Fig. 3-10) and selects between the right- 
hand four displays and the left-hand four displays (Figs. 3-10 and 3-11). 



DATA BUS 


MNEM 


DESCRIPTION 


d7 


X 


Don't care 


d6 


X 


d5 


X 


d4 


X 


d3 


WR 


1 = Write; = Write inhibit 


d2 


A2 


1 = Left-half select (positions 7, 6, 5, 4) 
= Right-half select (positions 3, 2, 1, 0) 


d1 


A1 


Don't care 


dO 


AG 



DISPLAY 
POSITION 


LEFT HALF 


RIGHT HALF 


7 


6 


5 


4 


3 


2 


1 





DATA BIT 


B3 


B2 


B1 


B0 


B3 


B2 


B1 


B0 


A2 


1 






Note: Standard control port address is HEX D1. 



Figure 3-10. Control Port Bit 
Assignments for Cursor Mode— 7303 Card. 



Figure 3-11. Left/Right Display Position 
Group Select for Cursor Mode— 7303 Card. 



O 



3-6 



Programming in the Cursor Display Mode. With a valid ASCI I character loaded to a display position, the cursor 
character can also be displayed in that position. When the cursor is removed, the same ASCII character will 
reappear. 

Cursor characters can be turned on or off in any combination, in groups of four display positions (right half = 
positions 0, 1, 2, 3 and left half = positions 4, 5, 6, 7). Controlling all eight cursors requires two separate 
operations. 

Setting/clearing the left-half or right-half cursor memories requires four steps in the program: 

1. Output the desired states of four of the cursors to the data port (Fig. 3-9). 

2. Output the left/right select bit with write == to the control port (Fig. 3-10). 

3. Repeat step 2, but set the write bit = 1 . 

4. Repeat step 2 (write bit returns to zero, protecting the display). 

These steps are summarized as a flow diagram and resulting waveforms in Figs. 3-12 and 3-13 below. 





f DISPLAY "\ 
\^ CURSORS J 






STEP 1 


WRITE 4 CURSOR 
STATES TO 
DATA PORT 








STEP 2 


WRITE CONTROL 

PORT SELECTING 

LEFT/RIGHT 

DISPLAYS AND WR=0 








STEP 3 


WRITE CONTROL 

PORT SELECTING 

LEFT/RIGHT 

DISPLAYS AND WR=1 








STEP 4 


WRITE CONTROL 

PORT SELECTING 

LEFT/RIGHT 

DISPLAYS AND WR=0 








( FINISHED J 





DISPLAY POSITION 




PROGRAM STEP 


LEFT HALF 


RIGHT HALF 


COMMENT 


Step 2 


04 


00 


Write = 


Step 3 


OC 


08 


Write = 1 


Step 4 


04 


00 


Write = 



Program Values for Steps 2, 3, 4. 



Figure 3-12. Flow Diagram off Cursor Mode Events for the 7303. 



DATA b0 . b3 
PORT 



STEP 1 

1 



X 



4-BIT CURSOR PATTERN VALID 



X 



LEFT 1 
f AZ RIGHTO 



CONTROL 
PORT 



WRITE 



STEP 2 

1 < 



X 



STEP 3 



STEP 4 



A2 (L/R SELECT) VALID 



WR 1 



WR-0 



ACTIVE 



X 



k WR=0 



O 



Figure 3-13. Cursor Mode Timing Waveforms for the 7303. 

(Note: Waveforms illustrate program values. WR is low active in hardware.) 



3-7 



Keyboard 

The keyboard consists of a RESET key and 24 program-definable keys (Fig. 3-14). 

The RESET key is not programmable. When pressed, it grounds the 7303's PBRESET* output to the STD BUS 
backplane. This signal is provided to reset the system processor card, which responds by generating 
SYSRESET*. SYSRESET* is an input to the 7303 card, which resets the 7303's output ports. The exact 
characteristics of the SYSRESET* signal depend on the processor card in use. 

The 24 program-definable keys are wired in a 4 x 6 switch matrix. The four columns (vertical axis) are driven by 
the data port (output DO port bits 0, 1 , 2, 3) and the six rows (horizontal axis) are sensed by input port DO bits 0, 
1,2,3,4,5. 

Reading the keyboard is a programmed operation. The program strobes each column of keys in turn, using 
rotate or shift instructions to move the strobe (a logic "1 ") from column to column. As each column is strobed, 
the program reads the input port to see if a switch closure has connected the strobe bit to the input port. If so, 
both key coordinates are now known (the program generated the column value and the input port read the row 
value), so that the value of the key can be computed. If not, the program steps the strobe to the next column and 
repeats the process until a key closure occurs. 



o 



TYPICAL 
+5V KEYSWITCH 



i 



Z3t 



-ID LINE 



bLINE 



ID5* 



ID4' 



ID3* 



ID2* 



\DV 



IDO* 



> PBRESET* 




d7 



DATA PORT 



dO 



O- 

0~ 

OUTPUT o_ 

PORT o_ 

ADDRESS X 

DO *^~ 



d0-d7/8 



^ 



.£ 



O 



14 


15 


16 


-17 


RE- 
SET 




C 


D 


E 


F 


13 


8 


9 


A 


B 


12 


4 


5 


6 


7 


11 





1 


2 


3 


10 



Physical Layout 



Figure 3-14. Keyboard Programming Model for the 7303. 



o 



3-8 



Key Values. The value assigned to a key is an arbitrary, unique identifier that can be derived once the column 
and row coordinates are known. The (DECODE.KEY) subroutine provided in the 7303's software package in 
Section 4 uses an algorithm that identifies each key with a hexadecimal number in the 00-1 7 range. The 7303 is 
shipped with key labels that show the value that will be generated by the (DECODE.KEY) subroutine when the 
key is pressed. 

Frequently, the value associated with a key is meaningless in relation to the application, and the user may wish 
to rename the key with a more meaningful label. The generalized (DECODE.KEY) subroutine is still used to 
locate a key closure, but the value returned is decoded a second time to lead to a specific system function. For 
example, the CALCULATOR program example in Section 4 shows how to use the compare and conditional 
jump instructions to detect the "11" key and assign it the "CLEAR DISPLAY" system function. 

Key Reading Procedures. In addition to simply detecting and decoding a key closure, the program may also be 
responsible for the following key-control procedures: 

1. Differentiate between noise and a genuine key closure. 

2. Ignore key-contact bounce when a key closes or opens. 

3. React only when the key closes, not when it opens (or vice versa). 

4. Avoid multiple responses to the same closure. 

Noise and key-contact bounce can be suppressed by programming a double READ with a time delay between 
the READs as shown in Fig. 3-15. 



O 




SAVE KEY 
COORDINATES 



DETECT 

KEY 
CLOSURE 



TIME DELAY 

*1 5ms FOR 

SWITCH BOUNCE 



+5V - 
GND 



REJECT 

AS 
NOISE 



DETECT 

KEY 
CLOSURE 



ACCEPT 

KEY 

& 

DECODE 



Voltage Waveform at Row in Key Matrix 




DECODE 
THE 
KEY 



Example of Program Flow 

Figure 3-15. Programming Key Bounce and Noise Rejection for the 7303. 

(Note: This figure illustrates the technique of read/delay/ re-read/com pare, which allows the 
program to differentiate between noise and a legitimate key closure, and to pause while the key 
contacts settle.) 



3-9 



In most instances, it is desirable for the key to be effective when pressed, not when released. Because of the 
speed of microprocessors, there is also a real possibility that the system might react more than once to the 
same key closure before the operator can remove his finger (with practice, an operator can deliberately close 
and release a small pushbutton in about 50ms; however, this represents an absolute minimum and the 
program should not make assumptions about the operator's characteristics). 

The (READ. KEY) subroutine in Section 4 shows how to combine the key decode process with procedural 
controls to produce reliable, error-free keyboard entries. 

The basic assumption in the (READ. KEY) routine is that when the subroutine is entered, the operator's finger is 
still on the key that was just decoded. The software waits until the operator releases the previous key, then 
waits again until he presses the next key, then decodes the next key. This technique ensures two important 
characteristics: 

1. The system will react one and only one time to one key closure. 

2. The system's reaction will take place immediately after the key is closed and not when it is 
released. 

Figure 3-16 shows a flow diagram of the major events during the (READ. KEY) subroutine. 



o 




o 



Figure 3-16. Recommended System-Level Keyboard Procedure for the 7303. 

(Note: Contact bounce and noise rejection are not shown.) 



3-10 



o 



Binary LED Display 

The 8-bit binary LED display (Fig. 3-17) is driven directly by output data port DO— the same output port that 
strobes the keyboard and supplies ASCII data to the alphanumeric display. When a bit from this port is in the 
high state, the corresponding LED lights up. The LED display is cleared by the SYSRESET* input. 

Because output data port DO is used in both alphanumeric display and keyboard decoding operations, the 
binary LEDs change when you address either the display or keyboard. The binary LEDs are useful in training, 
or in developing programs for the alphanumeric display and keyboard. 

You can also use the binary LEDs to display data that is unrelated to the alphanumeric display and keyboard, 
but when you do: 

1. Refresh the binary LED display after any keyboard scan or alphanumeric display operation. 

2. Note that the binary LEDs will show dynamic keyboard-scanning activity for as long as a 
keyboard key is depressed (using the subroutine in Section 4). 

3. Do not output binary display information to the LEDs, unless the alphanumeric display's WRITE 
bit (output port D1, bit 3) is first set to the "0" state to inhibit changes in alphanumeric display. 



O 



DATA PORT 



+5V 



OUTPUT 

PORT 

ADDRESS 

DO 




b7< 



7 

b6* 


6 

b5* 


5 4 3 2 
b4* b3* b2* b1* 


1 

bO* 



*Low Level Active 



¥■ 



Figure 3-17. Binary LED Display for the 7303. 



Rocker Switches 

Two rocker-type toggle switches (uncommitted) provide general mode selection. They connect directly to bits 
6 and 7 of input port DO, respectively (Fig. 3-18). Their condition (ON or OFF) can be read by the program at 
any time. Figure 3-1 9 shows the logic state returned according to switch position. Switch S1 is on the right side 
of the display and S2 is on the left. 



DATA PORT 



o 



B7 



LEFT S2 




'B6 



OFF (DOWN) 



+5V 
JON (UP) 
RIGHT S1 ^O 



+5V 

J? 



1 



INPUT 

PORT 

ADDRESS 

DO 



OFF (DOWN) 



Figure 3-18. Rocker Switches for the 7303. 







ROCKER SWITCH 


SWITCH 
POSITION 


S1 


S2 


ON 

(up) 


OFF 
(down) 


ON 
(up) 


OFF 
(down) 


Input Port DO 
(Data Port) 


Bit 7 


— 


— 


1 





Bit 6 


1 





— 


— 



Figure 3-19. Rocker Switch Status for the 7303. 



3-11 



o 



o 



o 



3-12 



o 



SECTION 4 
Operating Software 



Introduction 

This section contains hardware-level subroutine modules with which to operate the display and keyboard. It 
also includes short programs that may help you in testing or repairing the card, and that illustrate how the 
subroutines can be linked to work together at system level. 

The software in this section can be used without license from Pro-Log. Although tested and believed correct, 
this software is not represented to be free from errors or copyright infringement, or appropriate for any specific 
application. 

The subroutines are in STD instruction mnemonics, using 8080 assembly codes. They execute in 8080, 8085, 
Z80, NSC 800, and other code-compatible microprocessor systems. The coding forms are grouped at the end 
of this section, following the flowcharts. 

Flowcharts, which do not refer to microprocessor characteristics, allow the subroutines to be easily adapted to 
other microprocessor types. 

The subroutines are grouped in functional modules. Each module specification describes the module's 
content, including flowcharts. Individual subroutine specifications give memory, entry, and exit requirements 
for each path, plus timing, and other necessary information. 

Memory Addresses 

Full memory addresses are given. They are preferred addresses that allow the subroutines to work with those 
provided for other Series 7000 STD BUS cards from Pro-Log. The program addresses correspond to the Series 
7800 processor cards' onboard ROM/EPROM and RAM sockets. 

If your system can not use the memory addresses in the 7303's software package, simply change the memory 
page addresses, as required, when loading these modules into your system. Memory addresses that must be 
located in RAM are noted on the program coding forms. Other locations are intended for ROM storage, but 
they can also be executed in RAM. 

I/O Port Addresses 

The 7303's I/O ports are assigned preferred hexadecimal addresses DO and D1 for compatibility with other 
Series 7000 cards. Section 2 shows how to remap these addresses if necessary. This software can be used by 
simply changing the port addresses when loading the program modules into your system. 

Note that each input (IPA) and output (OPA) instruction is extended to three bytes by the addition of a no- 
operation (NOP) instruction in this software. This allows the user to replace the IPA and OPA instructions with 
the 3-byte LDAD/STAD instructions, if the 7303 card is memory-mapped (with a memory page address 
decoder provided by the user on another card to generate the IORQ* signal). Also, the IPA/OPA instructions 
can be replaced by jump-to-subroutine (JS) instructions for constructing subroutines in RAM, to read/write 
the 7303's ports. This allows the program to vary the port address, which in turn allows the same software 
package to be used for several 7303 cards in the same card rack. 



4-1 



Software Package Contents 

Figures 4-1 and 4-2 list the demonstration/test programs and subroutines, respectively, in the 7303's software 
package. 

Figure 4-1 lists short, endless-loop operating programs for demonstrating and repairing the 7303. These 
programs are examples of how the subroutines in the software package can be linked together. Monitor the 
execution of these programs with an M800 system analyzer and other test equipment to facilitate repair of the 
7303, or use them as programming examples or for educational purposes. 



o 



PROGRAM NAME 


FUNCTION 


SEE 
FIGURE 


DISPLAY.DEMO 


Uses (BILLBOARD) and (LAMP.TEST) subroutines. Illustrates 
a technique for displaying a long message on a display with a 
limited number of positions. Repeats the message "PRO-LOG 
7303" twice, tests LED segments, then repeats. 


4-56 


DISPLAY.SELF 


Displays address/data for the 256 memory bytes in memory 
page 10, which is where the display subroutines are stored. 
Displays information on the program coding forms in this 
section, then repeats. Uses (DISP.2.IN.C). 


4-57 


CALCULATOR 


Illustrates how (READ.KEY) and (MESSAGE) can work 
together with memory manipulation to create a calculator- 
style data entry, with keystrokes shifted from right to left across 
the display. 


4-58 


DISPLAY.TEST 


Uses (DISPLAY.8) to step the7303's display through the entire 
ASCII character set with each character displayed in sequence 
in all eight display positions. 


4-59 


KEY.TEST 


Uses (READ.KEY) and (DISP.2.IN.C) to display the 2-digit hex 
value of each key when the key is pressed. Allows the operator 
to test each key or to monitor the decode and display pro- 
cesses on the M800 system analyzer. 


4-60 



o 



( ) Denotes subroutine labels 



Figure 4-1. Index of Demonstration and Test Programs for the 7303. 

(Note: Because these programs are written as endless loops, it is necessary 
to reset the system processor to exit from them.) 



o 



4-2 



Figure 4-2 lists the general purpose, hardware-level subroutines provided for operating the 7303. These 
subroutines allow the user's program to communicate with the 7303 via data "mailboxes" in the processor's 
internal registers and in RAM, avoiding the need to write port and bit manipulation software. 



MODULE NAME 


SUBROUTINE NAME AND FUNCTION 


SEE FIGURE 


ASCII Display Driver 

Controls ASCII display 
operation 


(DISPLAY) Displays any one ASCII character 
in any one position 

(MEM.DISP) Displays one ASCII character 
from memory 

(STROBE) Pulses the display's WRITE line 


4-7 
4-8 & 4-9 

4-10 & 4-11 

4-12 &4-13 


Cursor Control 

Controls cursor display 
operation 


(CURSORS) Turns on/off any combination of 

cursors 
(CLR. CURSORS) Removes cursors (not ASCII 

characters) 


4-14 
4-15 &4-16 

4-17 &4-18 


Display Service 

Miscellaneous service 
routines 


(CLEAR. DISPLAY) Blanks ASCII characters (not 
cursors) 

(CLEAR. BOTH) Removes both ASCII characters 
and cursors 

(DISPLAY.8) Displays only one ASCII char- 
acter in all 8 display positions 

(LAMP.TEST) Turns on all LED segments and 
indicators 


4-19 
4-20 & 4-21 

4-22 & 4-23 

4-24 & 4-25 

4-26 & 4-27 


Hexadecimal/ASCII Conversion 

Accepts hexadecimal input 
from various sources 


(HEX/ASCII) Converts one hex digit to one 
ASCII character 

(MEM/ASCII) Converts block of binary in mem- 
ory into displayable ASCII codes 

(DISP.HEX) Combines (HEX/ASCII) and 
(DISPLAY) 

(DISP.2.IN.C) Displays two hex digits in internal 
register 


4-28 
4-29 & 4-30 

4-31 & 4-32 

4-33 & 4-34 

4-35 & 4-36 


Formatted Messages 

Ready to use message 
formats 


(MESSAGE) Displays 8-character ASCII mes- 
sage from anywhere in memory 

(BILLBOARD) Displays N-character message 
from anywhere in memory in bill- 
board fashion 


4-37 
4-38 & 4-39 

4-40 & 4-41 


Key and Switch Data Entry 

Performs all key and switch 
hardware manipulation 


(READ.KEY) General keyboard read routine 
(DECODE.KEY) Not for general use - see text 
(SCAN) Detects keyboard activity 
(ROCKER.STATUS) Moves switch states to processor 
status flags 


4-42 
4-43 & 4-44 

4-45 & 4-46 
4-47 & 4-48 


Auxiliary Tinning 

Inexact delays for display 
viewing and switch debounce 


(DISPLAY.DELAY) Not for general timing applica- 
tions - see text 

(LONG. DELAY) Not for general timing applica- 
tions - see text 

(DEBOUNCE.DELAY) Not for general timing applica- 
tions - see text 


4-49 
4-50 & 4-51 

4-52 & 4-53 

4-54 & 4-55 



( ) Denotes subroutine labels 

Figure 4-2. Index of Keyboard and Display Subroutines for the 7303. 



4-3 



Memory Maps 

Figures 4-3 through 4-6 are memory maps. Figure 4-3 shows the 16K address space occupied by the Series 
7800 processor cards and the location of the 7303 software package within the processor card's memory. 
Figures 4-4 and 4-5 map the specific subroutines within memory pages 10 and 11 (hexadecimal locations 
1 000-1 1FF). Figure 4-6 shows the RAM "mailbox" area within memory page 21 (hexadecimal locations 
2100-2109). 



o 



PAGE 


xO 


x1 


x2 


x3 


x4 


x5 


x6 


x7 


x8 


x9 


xA 


xB 


xC 


xD 


xE 


xF 




0000 




0800 




Ox 




PROM SOCKET 
(Users Program) 

07FF 




PROM 1 SOCKET 

0FFF 


1x 


7303 © 
— SOFTWARE — ►-- 
PACKAGE ^ 

o 


PROM 2 SOCKET 


1800 


PROM 3 SOCKET 




w 
10FFJ11FFJ 


17FF 




1FFF 




2000 fHI 

f lot ! 

2S io i 

S5 ,C !a> » 


i 
I 

i 
I 

RAM 


2400 

RAM 


2800 


RAM 


2C00 

RAM 


2x 


5 * "<CM 1 

o^!s 1 i 

* J to H I 

▼SRI' 
20FF;^y J 


1st 1K 

I 
I 
i 
i 
I 
i 

J23FF 


2nd 1K 

27FF 




3rd 1K 

2BFF 


4th 1K 

2FFF 




3000 






3x 




NOT USED 


3FFF 



o 



NOTES 

1. 7801 (8085A) and 7303 (Z80) processor cards have sockets for 8K ROM/PROM (sockets labeled PROM - PROM 3). 
These cards are shipped with these sockets empty. Also, the cards have sockets for 4K. RAM, and the card is shipped with 
1st 1K loaded and 2nd, 3rd, and 4th 1K sockets empty. 

2. This map shows the 7303 software loaded in user-supplied PROM 2. Ten locations (2100-2109) in the RAM supplied with 
the processor card are used by the software. Page 20 (memory addresses 2000-20FF) is recommended for the subroutine 
return address stack. 



Figure 4-3. 16K Memory Map— 7303 Software Package 
in 7801/7803 Processor Card Onboard Memory Sockets. 



O 



4-4 



PAGE ADDRESS 10 



o 



LINE 


LABEL 


00 


(MEM.DISP) 


01 




- 


02 




03 




04 




05 




06 




07 


(STROBE) 


08 




f 


09 




0A 




OB 




OC 




OD 




OE 




OF 




10 




11 




12 




13 




14 




15 




16 


1 


17 






18 






19 






1A 


(CLEAF 


.BOTH) 


1B 






1C 






1D 


(CLEAR.C 


)ISPLAY) 


1E 




r 


1F 




20 




21 


1 


22 






23 






24 






25 






26 






27 






28 






29 






2A 






2B 


(MESS 


AGE) 


2C 




f 


2D 




2E 




2F 




30 




31 




32 




33 




34 




35 




36 




37 




38 


J 


39 


(BILLB( 


DARD) 


3A 




3B 




3C 




3D 




3E 




3F 





LINE 


LABEL 


40 




f 


41 




42 




43 




44 




45 




46 




47 




48 




49 




4A 




4B 




4C 


1 


4D 


(D1SPLAY.8) 


4E 




f 


4F 




50 




51 




52 




53 




54 




55 




56 




57 




58 




59 




5A 




5B 


^ 


5C 






5D 






5E 






5F 






60 


DEMO ME 


ESSAGE 


61 




r ~~ 


62 




63 




64 




65 




66 




67 




68 




69 




6A 




6B 




6C 




6D 




6E 




6F 




70 




71 




72 




73 




74 




75 




76 




77 




78 




79 




7A 




7B 




7C 




7D 




7E 




7F 


1 



LINE 


LABEL 


80 


(CLR.CURSORS) 


81 






82 


(CURSORS) 


83 




r 


84 




85 




86 




87 




88 




89 




8A 




8B 




8C 




8D 




8E 




8F 




90 




91 




92 




93 




94 




95 




96 




97 




98 




99 




9A 




9B 


1 


9C 






9D 


(HEX/ASCII) 


9E 




r 


9F 




AO 




A1 




A2 




A3 




A4 




A5 




A6 




A7 




A8 




A9 


1 


AA 




AB 


(MEM/ 


ASCII) 


AC 




| 


AD 




AE 




AF 




BO 




B1 




B2 




B3 




B4 




B5 




B6 




B7 




B8 




B9 




BA 




BB 




BC 




BD 




BE 




BF 





LINE 


LABEL 


CO 




r 


CI 




C2 




C3 




C4 


^ 


C5 






C6 






C7 


(DISP.HEX) 


C8 




r 


C9 




CA 




CB 




CC 


1 


CD 




CE 


(DISP.2.N.C) 


CF 




r 


DO 




D1 




D2 




D3 




D4 




D5 




D6 




D7 




D8 




D9 




DA 




DB 




DC 




DD 




DE 


1 


DF 




EO 


(DISPLAY.DELAY) 


E1 




z 


E2 




E3 




E4 




E5 


DEBOUNCE.DELAY) 


E6 







E7 




E8 




E9 




EA 


(LONG.DELAY) 


EB 




r 


EC 




ED 




EE 




EF 




FO 




F1 




F2 


1 


F3 


(LAMP 


TEST) 


F4 




r " 


F5 




F6 




F7 




F8 




F9 




FA 




FB 




FC 




FD 


^ 


FE 






FF 







Figure 4-4. 256-Byte Memory Map— 7303 Alphanumeric Display Subroutines. 



4-5 



PAGE ADDRESS 11 



LINE 


LABEL 


00 


DISPLAY.DEMO 


01 




' 


02 




03 




04 




05 




06 




07 




08 




09 




0A 




OB 




OC 




OD 




OE 




OF 




10 




11 




12 




13 




14 




15 




16 




17 




18 




19 




1A 


1 


1B 


DISPLA 


Y.SELF 


1C 




- 


1D 




1E 




1F 




20 




21 




22 




23 




24 




25 




26 




27 




28 




29 




2A 




2B 




2C 




2D 




2E 




2F 




30 




31 




32 




33 




34 




35 




36 




37 




38 




39 




3A 




3B 




3C 




3D 




3E 




3F 





LINE 


LABEL 


40 




r 


41 




42 




43 




44 




45 




46 




47 




48 




49 




4A 




4B 




4C 




4D 




4E 




4F 




50 




51 




52 


1 


53 






54 






55 


(READ 


.KEY) 


56 




f 


57 




58 




59 




5A 




5B 




5G 




50 




5E 




5F 




60 




61 




62 




63 


} 


64 


(DECOC 


)E.KEY) 


65 




- 


66 




67 




68 




69 




6A 




6B 




6C 




6D 




6E 




6F 




70 




71 




72 




73 




74 




75 




76 




77 




78 




79 




7A 




7B 




7C 




7D 




7E 




7F 





LINE 


LABEL 


80 




f 


81 




82 




83 




84 




85 




86 




87 




88 




89 




8A 




8B 




8C 




8D 




8E 




8F 




90 




91 




92 




93 




94 




95 




96 




97 




98 




99 




9A 




9B 




9C 




9D 




9E 




9F 




AO 




A1 




A2 


■ 1 


A3 






A4 






A5 






A6 






A7 


(SC 


AN) 


A8 




r 


A9 




AA 




AB 




AC 




AD 




AE 




AF 




BO 




B1 


^ 


B2 






B3 






B4 


(RdCKER 


STATUS) 


B5 




r 


B6 




B7 




B8 




B9 




BA 




BB 




BC 




BD 




BE 




BF 


1 



LINE 


LABEL 


CO 


CALCULATOR 


C1 




' 


C2 




C3 




C4 




C5 




C6 




C7 




C8 




C9 




CA 




CB 




CC 




CD 




CE 




CF 




DO 




D1 




D2 




D3 




D4 




D5 




D6 




D7 




D8 




D9 




DA 




DB 




DC 




DD 




DE 




DF 




EO 




E1 




E2 




E3 




E4 




E5 




E6 




E7 




E8 




E9 




EA 




EB 




EC 


. .i 


ED 






EE 






EF 






FO 


KEY.TEST 


F1 




f 


F2 




F3 




F4 




F5 




F6 




F7 




F8 




F9 




FA 




FB 




FC 




FD 




FE 




FF 


1 



o 



o 



Figure 4-5. 256-Byte Memory Map— 7303 Keyboard Subroutines and Demonstration Programs. 



o 



4-6 



PAQE ADDRESS 21 - RAM 



O 



LINE 


LABEL 


00 


TEXT START ADDR. 


01 


I 


02 


CHARACTER 7 


03 


♦ 


04 


T 


05 


MESSAGE 


06 


BUFFER 


07 


I 


08 


T 


09 


CHARACTER 


0A 




OB 




OC 




OD 




OE 




OF 




10 




11 




12 




13 




14 




15 




16 




17 




18 




19 




1A 




1B 




1C 




1D 




1E 




1F 




20 




21 




22 




23 




24 




25 




26 




27 




28 




29 




2A 




2B 




2C 




2D 




2E 




2F 




30 




31 




32 




33 




34 




35 




36 




37 




38 




39 




3A 




3B 




3C 




3D 




3E 




3F 





LINE 


LABEL 


40 




41 




42 




43 




44 




45 




46 




47 




48 




49 




4A 




4B 




4C 




4D 




4E 




4F 




50 




51 




52 




53 




54 




55 




56 




57 




58 




59 




5A 




5B 




5C 




5D 




5E 




5F 




60 




61 




62 




63 




64 




65 




66 




67 




68 




69 




6A 




6B 




6C 




60 




6E 




6F 




70 




71 




72 




73 




74 




75 




76 




77 




78 




79 




7A 




7B 




7C 




7D 




7E 




7F 





LINE 


LABEL 


80 




81 




82 




83 




84 




85 




86 




87 




88 




89 




8A 




8B 




8C 




8D 




8E 




8F 




90 




91 




92 




93 




94 




95 




96 




97 




98 




99 




9A 




9B 




9C 




9D 




9E 




9F 




AO 




A1 




A2 




A3 




A4 




A5 




A6 




A7 




A8 




A9 




AA 




AB 




AC 




AD 




AE 




AF 




BO 




B1 




B2 




B3 




B4 




B5 




B6 




B7 




B8 




B9 




BA 




BB 




BC 




BD 




BE 




BF 





LINE 


LABEL 


CO 




C1 




C2 




C3 




C4 




C5 




C6 




C7 




C8 




C9 




CA 




CB 




CC 




CD 




CE 




CF 




DO 




D1 




D2 




D3 




D4 




D5 




D6 




D7 




D8 




D9 




DA 




DB 




DC 




DD 




DE 




DF 




EO 




E1 




E2 




E3 




E4 




E5 




E6 




E7 




E8 




E9 




EA 




EB 




EC 




ED 




EE 




EF 




FO 




F1 




F2 




F3 




F4 




F5 




F6 




F7 




F8 




F9 




FA 




FB 




FC 




FD 




FE 




FF 





NOTE 

Only RAM locations 2100-2109 are used by the 7303; however, other Pro-Log software packages may use other 
portions of the processor card's onboard RAM memory. The designer should consult the users' manuals for the other 
cards being used to find the total amount of RAM needed for subroutine support. 

Figure 4-6. 256-Byte Memory Map—7303 RAM "MAILBOX" Allocation. 



4-7 



o 



o 



o 



4-8 



ASCII Display Driver Module 



This program module displays single ASCII characters at addressable positions in the 7303's alphanumeric 
display. The module-s subroutines handle all of the hardware requirements of the display; data communi- 
cation with the subroutines is through "mailbox" locations in registers and memory. See Fig. 4-7 for flowchart. 

This module consists of hardware-level subroutines that are used by other portions of the software package 
to create more complex display operations. The designer can use these subroutines to adapt the ASCII 
display to any desired format. 
The subroutines are based on the 7303 programming requirements as shown in Section 3 of this manual. 

• Displays ASCII characters shown in Fig. 3-3. 

• Addressable display positions. 

• Does all hardware manipulation. 

• Not for cursor control— see cursor control module. 

• See DISPLAY. DEMO program for application example. 

• Contents: 

(DISPLAY)— Displays any one ASCII character in any one position 
(MEM. DISP)— Displays one ASCII character from memory 
(STROBE)— Pulses the display's WRITE line 



© 

f (DISPLAY) J 



Fig. 4-8 
Fig. 4-9 



Fig. 4-10 

Fig. 4-11 



((MEM.DISP)J ( 



FETCH ASCII 

CHARACTER 

FROM MEMORY 



OUTPUT ASCII 

WITH 
PARITY BIT = 1 
TO DATA PORT 



1007 



OUTPUT DISPLAY 
POSITION ADDRESS 
TO CONTROL PORT 
WITH WRITE BIT = 



SET WRITE 
BIT = 1 



SET WRITE 
BIT = 



1016 



f RETURN J 

© 



STROBE 



) 



Fig. 4-12 
Fig. 4-13 



Figure 4-7. Flowchart— ASCII Display Driver Module for the 7303. 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-9 



Subroutine: (DISPLAY) 



E1 Starting Address: 1001 



This subroutine allows any one ASCI I character to be displayed in any one of the eight alphanumeric display 
positions. 

Preset register B with the desired display position. Use the 3-bit codes shown in Fig. 3-6 to specify one of eight 
positions, loading the code in register B's bits 2, 1,0 with bits 3 through 7 = 0. For example, load register B with 
hexadecimal 06 to specify display position 6 (second display from the left). 

Preset the accumulator (register A) with the desired ASCI I character's hexadecimal code as shown in Fig. 3-3. 
The (DISPLAY) subroutine sets the parity bit (bit 7 = 1 ) as required bythe7303's displays, so that thecharacter 
may be brought in from an external interface and displayed without code alteration. 

Upon exit from the subroutine, the display position remains unaltered in register B, but the ASCII character in 
register A is lost. 



o 



PARAMETER 


ENTRY (El) 


RETURN© 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


ASCII character 


?? 


— 


Register 


B 


Display position 


Display position 


Load bits 0, 1, 2 only; 
bits 3 through 7 = 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-8. Register and Memory Allocation for 7303 Subroutine (DISPLAY). 



j 



o 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


MIN 


MAX 


Ns 


Stack memory 


2 


Bytes 


Np 


Program memory 


22 


Bytes 


Npt 


Total program memory 


22 


Bytes 


Nr 


RAM memory 





Bytes 


Te 


Execution time 8085 


98 


Time 
states 


Z80 


102 



Figure 4-9. Characteristics of 7303 Subroutine (DISPLAY). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-10 



Subroutine: (MEM.DISP) 



E2 Starting Address: 1000 



This subroutine allows any one ASCII character to be read from memory and displayed in any one of the eight 
alphanumeric display positions. 

Preset register B with the desired display position. Use the 3-bit codes shown in Fig. 3-6 to specify one of eight 
positions, loading the code in register B's bits 2,1,0 with bits 3 through 7 = 0. For example, load register B with 
hexadecimal 06 to specify display position 6 (second display from the left). 

Register pair H,L is used as a memory pointer and must be preset to the address of the memory location in 
ROM or RAM, where the ASCII character to be displayed is located. Figure 3-3 shows the ASCII characterset 
that can be displayed, and the range of codes that must be preloaded in memory before (MEM.DISP) can be 
used successfully. Use the (MEM/ASCII) subroutine in advance to translate raw binary memory data into 
ASCII if necessary. 

Upon exit from the subroutine, the display position in register B and the memory address in pair H, L remain 
unaltered. 



© 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


H,L 


Memory address 


Unaltered 


H,L points to ASCII 
character in memory 


Register 


B 


Display position 


Unaltered 


— 


Register 


A 


XX 


?? 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at e*it 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-10. Register and Memory Allocation for 7303 Subroutine (MEM.DISP). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (RJ) 


UNITS 


MIN 


MAX 


Ns 


Stack memory 


2 


Bytes 


Np 


Program memory 


23 


Bytes 


Npt 


Total program memory 


23 


Bytes 


Nr 


RAM memory 


1 


Bytes 


Te 


Execution time 


8085 


105 


Time 
states 


Z80 


109 



Figure 4-11. Characteristics of 7303 Subroutine (MEM.DISP). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-11 



Subroutine: (STROBE) 



E3 Starting Address: 1007 



This captive subroutine is used by other subroutines to drive the 7303 display's write line (WR*) low/high/low, 
while maintaining the desired display-position-address constant. This is explained in detail in Section 3. 

Use (STROBE) to adapt the 7303's display to an application for which the other subroutines in the software 
package are not suitable. It is important to note that other methods for driving the WR* control line may result 
in unwanted changes in the display, unless the programming rules outlined in Section 3 are followed. 



o 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


Display position 0-7 


?? 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-12. Register and Memory Allocation for 7303 Subroutine (STROBE). 



o 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


MIN 


MAX 


Ns 


Stack memory 


2 


Bytes 


Np 


Program memory 


16 


Bytes 


Npt 


Total program memory 


16 


Bytes 


Nr 


RAM memory 





Bytes 


Te 


Execution time 8085 


73 


Time 
states 


Z80 


76 



Figure 4-13. Characteristics of 7303 Subroutine (STROBE). 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



o 



4-12 



Cursor Control Module 



This program module controls the on/off state of the cursor characters. The module's subroutines handle all of 
the hardware requirements of the cursors. The full 8-position cursor on/off pattern is specified by a single 8-bit 
pattern preset in a register "mailbox." See Fig. 4-14 for flowchart. 

The subroutines are based on the 7303 programming requirements as shown in Section 3 of this manual. 



Controls all eight cursor on/off states. 

Does all hardware manipulation. 

One 8-bit word specifies cursor pattern. 

See DISPLAY.DEMO program for application example. 

Contents: 

(CURSORS)— Turns on/off any combination of cursors. 

(CLR.CURSORS)— Removes cursors (not ASCII characters). 



o 



Q 



© 



(CURSORS) 



Fig. 4-15 
Fig. 4-16 



Fig. 4-17 
Fig. 4-18 



l) \CURSORS)J 



SET CURSOR 
BIT PATTERN 
TO ALL ZEROS 



1082 



OUTPUT CURSOR 

BIT PATTERN FOR 

POSITIONS 0,1, 2,3 

TO DISPLAYS 

RIGHT SIDE 



STROBE 

THE 
DISPLAY 



108D 



OUTPUT CURSOR 

BIT PATTERN FOR 

POSITIONS 4, 5, 6, 7 

TO DISPLAY'S 

LEFT SIDE 



STROBE 

THE 
DISPLAY 



C RETURN ) 

© 



Fig. 4-13 



Fig. 4-13 



Figure 4-14. Flowchart— Cursor Control Module for the 7303. 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-13 



Subroutine: (CURSORS) 



E4 Starting Address: 1082 



This subroutine allows any combination of cursors to be displayed or removed in one operation, using a single 
8-bit word to specify the cursor on/off pattern. 



NOTE 
Each display position must have a valid ASCII character present in its character memory before it 
can display the cursor character. The SPACE character satisfies this requirement; use the (CLEAR. 
DISPLAY) or other subroutine to preload valid ASCII characters at least once, before using the 
(CURSORS) subroutine. 



o 



Preset register B with the desired cursor pattern. Register B's bits have 1:1 correspondence with the eight 
displays (bit 7 controls the cursor in display position 7). Set the bit = 1 to turn the cursor on, or bit = to remove 
the cursor. Upon exit, the cursor pattern in register B is unaltered. 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


B 


Cursor pattern 


Cursor pattern 


— 


Register 


A 


XX 


?? 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 



Figure 4-15. Register and Memory Allocation for 7303 Subroutine (CURSORS). 



o ' 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


Subroutine (STROBE) 
used. E3 Fig. 4-12. 


Np 


Program 
memory 


26 


Bytes 


— 


Npt 


Total program 
memory 


42 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


257 


Time states 


Absolute time varies 


time Z80 


264 



Figure 4-16. Characteristics off 7303 Subroutine (CURSORS). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-14 



Subroutine: (CLR.CURSORS) 



E5 Starting Address: 1080 



This subroutine removes all eight cursors from the alphanumeric display. The ASCII characters loaded into 
the display's ASCII memories before displaying the cursors will reappear when the cursors are removed. 

Register B is cleared by this subroutine. 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


B 


XX 


00 


— 


Register 


A 


XX 


?? 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-17. Register and Memory Allocation for 7303 Subroutine (CLR.CURSORS). 



© 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


Subroutine (STROBE) 
used. E3 Fig. 4-12. 


Np 


Program 
memory 


28 


Bytes 


— 


Npt 


Total program 
memory 


44 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


264 


Time states 


Absolute time varies 


time Z80 


271 



Figure 4-18. Characteristics of 7303 Subroutine (CLR.CURSORS). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-15 



o 



o 



4-16 



Display Service Routines Module 



This program module provides hardware-level service routines for clearing and testing the 7303's alpha- 
numeric display. See Fig. 4-19 for flowchart. 

The subroutines in this module are used to initialize the 7303 after power-on, to clear the display when desired, 
and to provide general service functions needed in incoming inspection, field testing, and repair of the 7303 
card. 

• (CLEAR. DISPLAY) removes ASCII characters only. 

• (CLEAR. BOTH) removes both ASCII and cursor characters. 

• (DISPLAY.8) allows the testing of each ASCII character in each display; it finds bad latches, decoders, 
drivers, and LED segments. 

• (LAMP.TEST) allows the testing of all alphanumeric and binary LED segments. 

• See DISPLAY.TEST program for application example. 



© 



© 



t 



Fig. 4-20 
Fig. 4-21 



© 



Fig. 4-22 
Fig. 4-23 



Y)\ MCLEAR.BOTH)) C 



Fig. 4-24 
Fig. 4-25 



(CLEAR.DISPLAY)) I (CLEAR.BOTH) 

101A 



REMOVE 
CURSORS 



101D 



FETCH ASCII 

SPACE 
CHARACTER 



104D 



START AT 

DISPLAY 

POSITION 7 



1050 



DISPLAY 

ASCII 

CHARACTER 



1054 



1058 



DECREMENT 
DISPLAY POSI- 
TION ADDRESS 



(DISPLAY. 



Fig. 4-17 



8) J f (LAMP.TEST) J 



Fig. 4-26 
Fig. 4-27 



© 



■g. 4-8 




RETURN 



) 



10F3 



LOAD CURSOR 

BIT PATTERN 

=ALL CURSORS 



DISPLAY ALL 
CURSORS 



10F8 



LOAD LED 
BIT PATTERN 



OUTPUT BIT 
PATTERN TO 
DATA PORT 



f RETURN J 



®, 



Fig. 4-15 



Figure 4-19. Flowchart— Display Service Module for the 7303. 



o 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-17 



Subroutine: (CLEAR.DISPLAY) 



E6 Starting Address: 101 D 



This subroutine blanks the alphanumeric display by loading the SPACE character in each of the eight 
positions. 

Note that the cursors are unaltered by this subroutine. Use (CLR.CURSORS) to remove cursor characters. 

Register B is cleared by this subroutine. 



o 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


C 


XX 


?? 


— 


Register 


F 


XX 


■?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-20. Register and Memory Allocation for 7303 Subroutine (CLEAR DISPLAY). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


Subroutine (DISPLAY) 
used. E1 Fig. 4-8. 


Np 


Program 
memory 


20 


Bytes 


— 


Npt 


Total program 
memory 


42 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


1228 


Time states 


— 


time Z80 


1213 



o 



Figure 4-21. Characteristics of 7303 Subroutine (CLEAR DISPLAY). 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



o 



4-18 



Subroutine: (CLEAR. BOTH) 



E7 Starting Address: 101 A 



o 



This subroutine removes all cursor characters from the display and blanks the alphanumeric display by 
loading the SPACE character in all eight positions. 

Register B is cleared by this subroutine. 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


C 


XX 


?? 


— 


Register 


D 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-22. Register and Memory Allocation for 7303 Subroutine (CLEAR. BOTH). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


See note 


Np 


Program 
memory 


23 


Bytes 


— 


Npt 


Total program 
memory 


73 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 
time Z80 


1510 
1501 


Time states 


— 



NOTE 

Subroutines used: (CLR. CURSORS) E5 Fig. 4-17. 

(DISPLAY) E1 Fig. 4-8. 



Figure 4-23. Characteristics of 7303 Subroutine (CLEAR.BOTH). 



© 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-19 



Subroutine: (DISPLAY.8) 



E8 Starting Address: 104D 



This subroutine displays the same ASCII character in all eight display positions simultaneously. It is a service 
routine for implementing the (CLEAR.DISPLAY) subroutine, and is useful for alphanumeric display test 
operations. 

Preset the accumulator (register A) with the character to be displayed. 

Upon exit, register C contains the ASCII character displayed and register B is cleared. 



o 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


ASCII character 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


C 


XX 


ASCII character 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-24. Register and Memory Allocation for 7303 Subroutine (DISPLAY.8). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (R3) 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


Subroutine (DISPLAY) 
used. E1 Fig. 4-8. 


Np 


Program 
memory 


15 


Bytes 


— 


Npt 


Total program 
memory 


37 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


1211 


Time states 


— 


time Z80 


1196 



o 



Figure 4-25. Characteristics of 7303 Subroutine (DISPLAY.8). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-20 



Subroutine: (LAMP.TEST) 



E9 Starting Address: 10F3 



o 



This subroutine displays the cursor character in all eight display positions (illuminating all LED segments in 
the alphanumeric display). It also writes hexadecimal FF to the 7303's output data port, which illuminates all of 
the eight binary LEDs located directly below the alphanumeric display. 



NOTE 

All the keyboard and display routines, except (ROCKER.STATUS) and (LAMP.TEST), will write to 
the output data port, altering the all-on state of the binary LED display. 

Consequently the designer should follow (LAMP.TEST) with a time delay, or other method, that 
gives the operator an opportunity to examine the LED display before executing other portions of the 
software package. 



O 



PARAMETER 


ENTRY @ 


RETURN @ 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


?? 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1 . For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-26. Register and Memory Allocation for 7303 Subroutine (LAMP.TEST). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


See Note 


Np 


Program 
memory 


11 


Bytes 


— 


Npt 


Total program 
memory 


53 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


313 


Time states 


— 


time Z80 


320 



Figure 4-27. Characteristics of 7303 Subroutine (LAMP.TEST). 







( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-21 



o 



o 



o 



4-22 



Hexadecimal/ASCII Conversion Module 



This program module converts binary data, in registers and in blocks of memory, into ASCII-encoded data 
suitable for display by the 7303 and for transmission via RS-232, TTY, and other media. See Fig. 4-28 for flow- 
chart. 

• Accepts one 4-bit hexadecimal digit (0000 through 1111 binary or 0-F hexadecimal) from a register and 
outputs one 8-bit ASCII character, 0-9 or A-F. 

• Accepts two 4-bit hexadecimal digits in each of 1-256 locations anywhere in memory and outputs 2-512 
ASCII characters to RAM memory. 

• Produces ASCII characters 0, 1 , 2, 3, 4, 5, 6, 7, 8, 9 and A, B, C, D, E, F, (upper case only) with parity bit set 
(bit 7 = 1). 

• See DISPLAY.SELF and KEY.TEST for application examples. 

• Contents: 

(HEX/ASCII)— Converts one hexadecimal digit to one ASCII character code. 
(MEM/ASCII)— Converts block of binary in memory into displayable ASCII codes. 
(DISP.HEX)— Combines (HEX/ASCII) and (DISPLAY). 
(DISP.2. IN. C)— Displays two hexadecimal digits in internal register. 



© 



O 







((HEX/ASCII) ) Fig. 4-29 
J Fig. 4-30 



( RETURN J 



109F 


IS ^> 

HEX > 9? 

[no 


sYES 










10A7 






10A4 






YIELDS 
B0-B4 


ADD B0 16 




ADD87 16 





















C RETURN J 







© 



((MEM/ASCII)) £9.4-31 



FETCH BINARY 

USING DATA 

SOURCE POINTER 



MEMORY BITS 
4-7 BECOME 
BITS 0-3 



RIGHT- AD JUST 

HIGH-ORDER 

HEX DIGIT 



(no; 

Fig. 4-29 



INCREMENT DATA 

DESTINATION 

POINTER 



FETCH BINARY 

USING DATA 

SOURCE POINTER 



STORE ASCII 

USING DATA 

DESTINATION 

POINTER 



INCREMENT 

SOURCE AND 

DESTINATION 

POINTER 




STORE ASCII 

USING DATA 

DESTINATION 

POINTER 



¥ 



Fig. 4-29 



Figure 4-28. Flowchart— Hexadecimal/ASCII Conversion Module for the 7303. 



f (DISP.HEX 


) 


Fig. 4-33 
Fig. 4-34 


10C7 




CONVERT HEX 
TO ASCII 


(E10) 

Fig. 4-29 


10CA 


/C\ 


DISPLAY 


Fig. 4-8 






) 




C RETURN 



MDISP.2.IN.C) J 


Fig. 4-35 
Fig. 4-36 


10CE 




ISOLATE AND 
RIGHT ADJUST 
BITS 4, 5, 6, 7 
FROM REG. C 




10D5 


r^s 


DISPLAY HEX 


Fig. 4-33 


10D8 




DECREMENT 
DISPLAY 
POSITION 
ADDRESS 




10D9 




ISOLATE BITS 

0,1,2, 3 FROM 
REG. C 




10DC 




DISPLAY HEX 


Fig. 4-33 








f RET 


URN J 

•> 



( ) Denotes subroutine label; * Low level active; E/R Entry/return path identifier encircled 



4-23 



■iMtiw ii iiiM P ji i w i> » ii ii ii titiy^ i i i iw »i iiiiti ii m l iMi ii Mww i iw i ^ i» w »iii iiinimAi i 



Subroutine: (HEX/ASCII) 



E10 Starting Address: 109D 



This subroutine converts a 4-bit binary/hexadecimal code into one of 16 ASCII characters: 0, 1 , 2, 3, 4, 5, 6, 7, 
8, 9, or A, B, C, D, E, F (upper case only) with parity set (bit 7 = 1). 

The ASCII codes returned by the subroutine for the 16 characters are shown in Fig. 3-3. 

Enter with the hexadecimal digit loaded in bits 3, 2,1,0 of the accumulator (register A). The most significant 
bits (4 through 7) of register A are "don't care" and will be masked by the subroutine. 

Upon exit, the ASCII character code is stored in register A, bits 7 through 0, and the input binary code is lost. 



o 



PARAMETER 


ENTRY (E10) 


RETURN(R5) 


RETURN(R6) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


Hexadecimal 
digit 0-F 


ASCII 

character 

0-9 


ASCII 

character 

A-F 


Converts 

bits 0-3. 

Bits 4-7 of 

accumulator are 

"don't care." 


Register 


F 


XX 


?? 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-29. Register and Memory Allocation for 7303 Subroutine (HEX/ASCII). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


RETURN (R6) 


UNITS 


MIN 


MAX 


MIN 


MAX 


Ns 


Stack 
memory 


2 


2 


Bytes 


Np 


Program 
memory 


13 


13 


Bytes 


Nr 


RAM memory 








Bytes 


Te 


Execution 8085 


See note 


See note 


Time states 


time Z80 


41 


41 



NOTE 

8085 time states are variable: 
38 if digit is HEX A, B, D, C, E, 
41 if digit is BCD (0-9). 



o 



Figure 4-30. Characteristics off 7303 Subroutine (HEX/ASCII). 



( ) Denotes subroutine (abet 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-24 



Subroutine: (MEM/ASCII) 



E11 Starting Address: 10AB 



This subroutine converts a block of memory locations (each containing 8-bit binary data expressed as two 4- 
bit hexadecimal digits) into a block of data with one ASCII character in each location. 



NOTE 

Since each 4-bit half of the binary input data is converted into one 8-bit ASCII character, the 
resulting block of output data written to RAM by this subroutine is twice as large as the block of input 
binary data. 



Preset register pair H,L with the first (lowest) address in the block of input binary data in memory, which may 
be in ROM or RAM space. 

Preset register pair D,E with the first (lowest) address in the block of output ASCII character data in memory, 
which can be in RAM only. 

Preset register B with the number of bytes in the block of input binary data. Use 01 for one byte, 02 for two 
bytes, etc., FF for 255 bytes, and 00 for 256 bytes. 

Upon exit, register B is cleared; register pair H,L points at the next location past the input data block; register 
pair D,E points at the next location past the output data block. 



© 



PARAMETER 


ENTRY (Ell) 


RETURN(R7) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


H,L 


MEM pointer input 


Last input +1 


Note 4 


Register 


D,E 


MEM pointer output 


Last input +1 


— 


Register 


B 


Input data counter 


00 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

4. First byte in ASCII output memory block is ASCII conversion of bits 4-7 of first byte in binary 
block; second byte in ASCII output memory block is bits 0-3 of first byte in binary block, etc. 

Figure 4-31. Register and Memory Allocation for 7303 Subroutine (MEM/ ASCII). 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-25 



Subroutine: (MEM/ ASCI I) 





SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN © 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


Subroutine (HEX/ASCII) 
used. E10 Fig. 4-29. 


Np 


Program 
memory 


26 


Bytes 


— 


Npt 


Total program 
memory 


39 


Bytes 


— 


Nr 


RAM memory 


3 


768 


Bytes 


— 


Te 


Execution 8085 


Note 1 


Time states 


— 


time Z80 


Note 2 



o 



NOTES 

1 . 8085 time states are variable; first binary memory location converted: 
229 if both digits are HEX A, B, C, D, E, F 

226 if one digit is BCD (0-9) 
223 if both digits are BCD. 
Each additional location: subtract 7 time states from above totals. 

2. Z80 time states: 

—First binary memory location converted, 

230 time states. 
—Each additional binary location, 

220 time states. 



Figure 4-32. Characteristics of 7303 Subroutine (MEM/ASCII). 



o 



o 



4-26 



Subroutine: (DISP.HEX) 



E12 Starting Address: 10C7 



This subroutine uses lower-level subroutines to display one hexadecimal digit (0-9 or A-F) in any one of the 
eight display positions. 

Preset register B with the desired display position. Use the 3-bit codes shown in Fig. 3-6 to specify one of eight 
positions, loading the code in register B's bits 2,1,0 with bits 3 through 7 = 0. For example, load register B with 
hexadecimal 06 to specify display position 6 (second display from the left). 

Preset the accumulator (register A) with the binary bit pattern of the hexadecimal digit (0000 through 1111 
binary) in register A's bits 3, 2, 1, 0; bits 4 through 7 are "don't care" and may contain any bit pattern. 

Upon exit, the display position remains unaltered in register B, but the hexadecimal digit in the accumulator is 
lost. 



PARAMETER 


ENTRY (E12) 


return(ri) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


Hexadecimal 
digit 0-F 


?? 


— 


Register 


F 


XX 


?? 


— 


Register 


B 


Display 
position 0-7 


Display 
position 0-7 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-33. Register and Memory Allocation for 7303 Subroutine (DISP.HEX). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
Memory 


4 


Bytes 


Subroutine (HEX/ ASCI I) 
used. E10 Fig. 4-29. 


Np 


Program 
memory 


6 


Bytes 


— 


Npt 


Total program 
memory 


41 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


See note 


Time states 


— 


time Z80 


180 



NOTE 

8085 time states depend on data: 
177 if digit is HEX A, B, C, D, E, F 
174 if digit is HEX (0-9). 



Figure 4-34. Characteristics of 7303 Subroutine (DISP.HEX). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-27 



Subroutine: (DISP.2.IN.C) 



E13 Starting Address: 10CE 



This subroutine converts the two 4-bit hexadecimal digits in register C into two 8-bit ASCII characters in the 
range 0-9 or A-F, and it displays them in two adjacent display positions. 

Preset register C with the data to be displayed. The subroutine converts register C's bits 4-7 into an ASCII 
character and displays the character in the display position specified below. Then, register C's bits 0-3 are 
converted into a second ASCII character and displayed in the display position immediately to the right of the 
position specified. 

Preset register B with the leftmost of two desired display positions. Use the 3-bit codes shown in Fig. 3-6 to 
specify one of seven positions, loading the code in register B's bits 2, 1, with bits 3 through 7 = 0. 



CAUTION 

Do not specify position zero; register B should contain the combinations 01 , 02, 03, 04, 05, 06, or 07 
only after this step. 



Upon exit, register B will have been decremented by 1 from its initial condition, and two hexadecimal digits in 
register C will have been unaltered. 



PARAMETER 


ENTRY(E13) 


return(W) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


C 


Two hex digits 


Two hex digits 


Note 4 


Register 


B 


Display position N 


Position N-1 


Note 5 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

4. Bits 4-7 converted to an ASCII code and displayed in specified display position: 
bits 0-3 displayed as ASCII character in adjacent display position on right. 

5. Bits 0-2 specify display position and must be nonzero (do not specify position 0). 

Figure 4-35. Register and Memory Allocation for 7303 Subroutine (DISP.2.IN.C). 



o 



o 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENT 


MIN 


MAX 


Ns 


Stack 
memory 


6 


Bytes 


Note 2 


Np 


Program 
memory 


17 


Bytes 


— 


Npt 


Total program 
memory 


58 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


See note 


Time states 


— 


time Z80 


418 



NOTES 

1 . 8085 time states are variable: 

413 if both digits are HEX A, B, C, D, E, F 
410 if one character is BCD (0-9) 
407 if both characters are BCD. 

2. Subroutine used: (DISP.HEX) E12 Fig. 4-33. 

. Figure 4-36. Characteristics of 7303 Subroutine (DISP.2.IN.C). 

() Denotes subroutine label; * Low level active; E/R Entry/return path identifier encircled. 



o 



4-28 



Formatted Messages Module 



This program module (see Fig. 4-37 for flowchart) uses the hardware-level subroutines to format and display 
messages of the designer's choice. Two styles are available: 

1. (MESSAGE) displays a static 8-character ASCII message from anywhere in memory. 

2. (BILLBOARD) displays a dynamic message of 8 characters or more from anywhere in memory, 
rotated across the display in billboard fashion. 

These formats can be used repeatedly and in combination to show system status, prompt the system's 
operator, and other applications. Use the Hexadecimal/ASCII Conversion Module and the Cursor Control 
Module for more variations on these basic formats. 

• Static 8-character ASCII message display. 

• Dynamic "billboard" display for messages of 8 characters or longer. 

• See DISPLAY.DEMO and CALCULATOR demonstration programs for application examples. 



O 



Mmessage)\ 



Fig. 4-38 
Fig. 4-39 



102B 



START AT DISPLAY 
POSITION 7 



DISPLAY ONE 

CHARACTER 

FROM MEMORY 



INCREMENT 
MEMORY 
POINTER 



© 

Fig. 4-10 







DECREMENT 

DISPLAY POSITION 

ADDRESS 



(billboard) 



READ MESSAGE'S 
START ADDRESS 
FROM MEMORY 



103C 



SAVE CURRENT 
START ADDRESS 



103D 



DISPLAY EIGHT 
CHARACTERS 
OF MESSAGE 



PAUSE APPROX. 
315 mt 



SAVE NEXT 
CHARACTER 
OF MESSAGE 



RESTORE 

CURRENT START 

ADDRESS 



Fig. 4-40 
Fig. 4-41 



Fig. 4-40 



Fig. 4-50 








INCREMENT 

CURRENT 

START ADDRESS 



Figure 4-37. Flowchart— Formatted Messages Module for the 7303. 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-29 



Subroutine: (MESSAGE) 



E14 Starting Address: 102B 



This subroutine displays an 8-character ASCII message from anywhere in memory. The job of creating a 
variable-format display can be simplified by manipulating an 8-character text buffer in RAM memory, then 
unconditionally displaying the content of the buffer using (MESSAGE) after each alteration of the buffer's 
content. See (BILLBOARD) for an example. 

Preset register pair H,L with the first (lowest address) memory location to be displayed. This can be in either 
RAM or ROM memory, and it appears in the leftmost display position. The (MESSAGE) subroutine fills the 
display from left to right, incrementing the H,L register pair each time until all eight locations are loaded with 
ASCII characters. 

Upon exit, register B is cleared and register pair H,L points at the last character (highest memory address) 
displayed. The displayed memory locations are unaltered. 



o 



PARAMETER 


ENTRY (E14) 


RETURN (W) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


H,L 


Memory pointer 


H,L points to 8th 
character displayed 


Note 4. 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

4. Set to point at first character (lowest address) in memory block containing 8 ASCII characters. 

Figure 4-38. Register and Memory Allocation for 7303 Subroutine (MESSAGE). 



o 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN @ 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


See note 


Np 


Program 
memory 


14 


Bytes 


— 


Npt 


Total program 
memory 


37 


Bytes 


— 


Nr 


RAM memory 


8 


Bytes 


— 


Te 


Execution 8085 


1321 


Time states 


— 


time Z80 


1337 



Note: Subroutine used: (MEM.DISP) E2 Fig. 4-10. 

Figure 4-39. Characteristics of 7303 Subroutine (MESSAGE). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-30 



Subroutine: (BILLBOARD) 



E15 Starting Address: 1039 



This subroutine shifts a long message of eight or more ASCII characters across the 8-position display, leaving 
each character combination in the display for about 300 ms before shifting. The text can begin anywhere in 
memory and be of any desired length. 

The entire message is displayed once, then the routine exits with the last eight characters in the message 
remaining in the display. This gives the program an opportunity to alter the message before the next iteration, 
if the text is loaded in RAM. Execute the (BILLBOARD) subroutine repeatedly to create an endlessly rotating 
billboard effect. 

The message consists of any number of ASCII characters (limited by the size of the user's contiguous 
memory), terminated by hexadecimal FF. The subroutine will exit after the FF code is encountered. 

Preset two sequential memory locations labeled TEXT.START (See RAM map, Fig. 4-6) with the first (lowest) 
memory address of the ASCII message. Do this only once— the subroutine can then be used repeatedly 
without additional presets. 

Upon exit, the text-start address in RAM is unaltered. 



NOTE 
When constructing the message, we recommend that the SPACE character (hexadecimal A0) be 
loaded as the first seven and last eight characters in the text. This produces the smooth transition 
from the end of the message to the beginning, which is characteristic of billboards. 



© 



PARAMETER 


ENTRY fis) 


RETURN ft) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


H,L 


Memory pointer 


Memory points 


— 


Register 


A,F 


XX 


?? 


— 


Register 


B 


XX 


?? 


— 


Register 


C 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-40. Register and Memory Allocation for 7303 Subroutine (BILLBOARD). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (R10) 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


6 


Bytes 


Note 3 


Np 


Program 
memory 


20 


Bytes 


— 


Npt 


Total program 
memory 


76 


Bytes 


— 


Nr 


RAM memory 


10 


User 
dependent 


Bytes 


— 


Te 


Execution 8085 




Note 1 


Time states 


— 


time Z80 




Note 2 



NOTES 

1. 8085— First 8 characters: 1,433 time states + delay. Each additional character = 1,427 time states + delay. 

2. Z80— First 8 characters: 1,920 time states + delay. Each additional character = 1,919 time states + delay. 

3. Subroutines used: (MESSAGE) E14 Fig. 4-38. (DISPLAY.DELAY) E20 Fig. 4-50. 

Figure 4-41. Characteristics of 7303 Subroutine (BILLBOARD). 



( ) Denotes subroutine label 



Low level active E/R Entry/return path identifier encircled 



4-31 



o 



o 



o 



4-32 



Key and Switch Data Entry Module 



This module controls the 7303's hexadecimal keyboard and translates the general purpose rocker-switch 
states into program status information for decision making. See Fig. 4-42 for the flowchart. 

The module contains subroutines that perform all procedural requirements of keyboard-reading and 
decoding as well as general subroutines that allow the user to design a special keyboard procedure. 

• Returns a unique 5-bit hexadecimal number (range 00-17) for each of 24 uncommitted keys— use 
table lookup and change key labels to perform any numeric or nonnumeric program function. 

• Performs all procedures including switch debounce, noise rejection; activate on depression/ 
ignore key release. 

• (READ. KEY) reads single key only— use other subroutines in module for multiple key closures 
and different procedures. 

• (ROCKER.STATUS) moves on/off states of switches to processor status flags for conditional 
jumps. 

• See CALCULATOR and KEY.TEST for application examples. 



O 




ROTATE A SINGLE 

BIT ACROSS KEY 

COLUMNS 




SAVE ROW 
AND COLUMN 
COORDINATES 



F.g 4-54 



COMPARE SAVED 
AND PRESENT 
COORDINATES 




CONVERT ROW 
ANO COLUMN 
COORDINATES 
TO KEY VALUE 



STROBE ALL KEY 

COLUMNS 

SIMULTANEOUSLY 



READ ALL 

KEY ROWS 

SIMULTANEOUSLY 



SET 2 FLAG 
IF NO KEY 
CLOSED 



1 1 Bt | 



( "" ) 



MROCKER.STATUSrN 



SET SIGN FLAG 
AND CLEAR Z 
FLAG IF S1 
IS CLOSED 



( EX ' T ) 



f RETURN J 

Figure 4-42. Flowchart— Key and Switch Data Entry Module for the 7303. 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-33 



Subroutine: (READ.KEY) 



E16 Starting Address: 1155 



This subroutine is recommended for most keyboard read/decode operations, regardless of the functional 
assignments associated with the keys and their labels. 

(READ.KEY) begins by determining that the keyboard is idle, and it will not proceed until it is. It then waits until 
a key is pressed, and it decodes the key's value after rejecting noise and switch bounce. Once entered, the 
subroutine cannot exit until a valid key closure has occurred. 



o 



The 7303 card is shipped with labels attached to the keys. The hexadecimal labels in the 00 to 17 range are the 
values that will be decoded by (READ.KEY) for the key pressed (Fig. 3-1 shows label values; note that the 
RESET key is electrically isolated from the other 24 keys and is not read by this subroutine). Even if you relabel 
the keys to nonnumeric functions (such as MOTOR START or CLEAR ENTRY), you would still use this 
subroutine to read the keyboard. Simply use the decoded value to determine which function to perform— see 
the CALCULATOR demonstration program for an example. 

Upon exit, the decoded key value is in both register A (for immediate use) and in register B, where it can be held 
momentarily if the accumulator is needed for other functions. 



PARAMETER 


ENTRY (E16) 


RETURN (jm) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


Key value 


— 


Register 


B 


XX 


Key value 


— 


Register 


B 


XX 


?? 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-43. Register and Memory Allocation for 7303 Subroutine (READ.KEY). 



o 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (r1J) 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


4 


Bytes 


Note 2 


Np 


Program 
memory 


78 


Bytes 


— 


Npt 


Total program 
memory 


103 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


Note 1 


Time states 


— 


time Z80 


Note 1 



NOTES 

1. Not predictable, due to human intervention. 

2. Subroutines used: (SCAN) E18 Fig. 4-45; (DEBOUNCE.DELAY) E22 Fig. 4-54 

Figure 4-44. Characteristics of 7303 Subroutine (READ.KEY). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-34 



Subroutine: (DECODE.KEY) 



E17 Starting Address: 1164 






This subroutine is similar to (READ.KEY), but it omits testing for the keyboard-idle condition before reading 
and decoding the key. 



IMPORTANT 

Unless the user adds additional procedural instructions when using the (DECODE.KEY) sub- 
routine, the system may react more than once to the same key closure, causing a system error. 

This subroutine is provided only to allow the user to design a special keyboard read/decode 
procedure, in applications where the (READ.KEY) subroutine, which is normally recommended, is 
not useful. 



For decoded key values and their location upon exit, see (READ.KEY). 



O 



4-35 



mm mm wn hj i j ii m i ,, ' u n n i ih ii ui i .pl 



Subroutine: (SCAN) 



E18 Starting Address: 1 1 A7 



This subroutine is used to check keyboard status, by determining whether any key is closed. If a key closure is 
detected, (SCAN) is unable to determine which key is closed. 

The subroutine is included for use with (DECODE/KEY), allowing the user to design a keyboard read/decode 
procedure if the (READ. KEY) subroutine, which is normally recommended, is not useful. 

Upon exit, the 2 (zero) flag can be tested to determine if any key has been pressed. The conditional jump 
instructions are as follows: 

1. The JP ZO instruction will result in a jump if a key is closed; no jump will occur if ail keys are idle. 

2. The JP Z1 instruction will result in a jump if all keys are idle; no jump will occur if any key is pressed. 

Note that (SCAN) can be mislead by switch bounce or noise. For this reason, we recommend that no 
program decision be made until the (SWITCH. DEBOUNCE) subroutine has been executed and (SCAN) has 
been repeated. See the (READ.KEY) flowchart (Fig. 4-42) for an example. 



o 



PARAMETER 


ENTRY (Els) 


RETURN (R12) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


F 


XX 


Keyboard status 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-45. Register and Memory Allocation for 7303 Subroutine (SCAN). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (R1^ 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


2 


Bytes 


— 


Np 


Program 
memory 


11 


Bytes 


— 


Npt 


Total program 
memory 


11 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


52 


Time states 


— 


time Z80 


54 



o 



Figure 4-46. Characteristics of 7303 Subroutine (SCAN). 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-36 



Subroutine: (ROCKER.STATUS) 



E19 Starting Address: 11 B4 



This subroutine moves the on/off status of the two rocker switches into the processor's flag (register F). This 
allows conditional jump instructions to alter the program flow according to the on/off (closed/open) status of 
the two uncommitted rocker switches. 

Upon exit, use the following conditional jump instructions: 

1. JP S1 or JP ZO will cause a jump if the right-hand rocker switch is closed. 

2. JP SO or JP Z1 will cause a jump if the right-hand rocker switch is open. 

3. JP C1 will cause a jump if the left-hand rocker switch is closed. 

4. JP CO will cause a jump if the left-hand rocker switch is open. 



PARAMETER 


ENTRY (E19) 


RETURN (R13) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


F 


XX 


Switch status 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-47. Register and Memory Allocation for 7303 Subroutine (ROCKER.STATUS). 



© 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN <^ 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


2 


Bytes 


— 


Np 


Program 
memory 


7 


Bytes 


— 


Npt 


Total program 
memory 


7 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


35 


Time states 


— 


time Z80 


36 



Figure 4-48. Characteristics of 7303 Subroutine (ROCKER.STATUS). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-37 



o 



o 



o 



4-38 



Auxiliary Timing Module 



This module contains captive subroutines used by the key and switch data entry module and by the demon- 
stration and test programs in the 7303's software package. See Fig. 4-49 for flowchart. 

The subroutines in this module are designed to provide satisfactory operation with a wide variety of micro- 
processor types, including 8080, 8085A, Z80, and NSC 800, all presumed to operate at the maximum clock 
frequency. Accordingly, these subroutines are not capable of generating accurate* timing and should not be 
used in any application requiring accurate timing. They are intended only to reduce the processor's execution 
rate to maintain human readability of the display in the demonstration programs, and to provide switch 
debounce time for the 7303's keyboard. 

• Approximate time delays used for display readability and switch debouncing. 

• Captive subroutines used by other 7303 program modules only. 



((DISPLAYA 
DELAY) J 



Fig. 4-50 



10EO 



((LONG. A 
DELAY) J 



Fig. 4-52 



10EA 



LOAD DELAY 

LOOP COUNT 

(= 315 ms) 



(DEBOUNCEA 
DELAY) J 



Fig. 4-54 



LOAD DELAY 

LOOP COUNT 

(= 625 ms 



o 



10EC 



LOAD DELAY 

LOOP COUNT 

(= 20 ms) 



DECREMENT 
LOOP COUNTER 




10ED , 

NO yS DELAY 
COUNT 

= 0? 



C RETURN J 



Figure 4-49. Flowchart— Auxiliary Timing Module for the 7303. 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-39 



Subroutine: (DISPLAY.DELAY) 



E20 Starting Address: 10E0 



This captive subroutine is used by (BILLBOARD) to pause about 315 ms between display shift operations. 

(DISPLAY.DELAY) produces an approximate time delay, which depends upon both microprocessor type and 
clock frequency and is not recommended for other timing applications. 



o 



PARAMETER 


ENTRY (Si) 


RETURN mU) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


C 


XX 


00 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-50. Register and Memory Allocation for 7303 Subroutine (DISPLAY.DELAY). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (R14) 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


2 


Bytes 


— 


Np 


Program 
memory 


19 


Bytes 


— 


Npt 


Total program 
memory 


19 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


27 + 24N 


Time states 


N = Loop count in 
B,C pair 


time Z80 


27 + 24N 



o 



Figure 4-51. Characteristics of 7303 Subroutine (DISPLAY.DELAY). 



( ) Denotes subroutine label 

..* Low level active 

E/R Entry/return path identifier encircled 



4-40 



Subroutine: (LONG.DELAY) 



E21 Starting Address: 10EA 



This captive subroutine is used by a demonstration program to pause about 625 ms between display opera- 
tions. 

(LONG.DELAY) produces an approximate time delay, which varies with microprocessor type and clock 
frequency and is not recommended for other timing applications. 



PARAMETER 


ENTRY (£) 


RETURN Q 


COMMENTS 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


C 


XX 


00 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-52. Register and Memory Allocation for 7303 Subroutine (LONG.DELAY). 



© 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (R14) 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


2 


Bytes 


— 


Np 


Program 
memory 


9 


Bytes 


— 


Npt 


Total program 
memory 


9 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


17 + 24N 


Time states 


N = Loop count in 
B,C pair 


time Z80 


17 + 24N 



Figure 4-53. Characteristics of 7303 Subroutine (LONG.DELAY). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-41 



Subroutine: (PEBOUNCE.DELAY) 



E22 Starting Address: 10E5 



This captive subroutine is used to debounce the key switches, producing a delay in the range of 15-25 ms. 
Because the time delay is approximate, varying with microprocessor type and clock frequency, this subroutine 



should not be used for other timing applications. 



o 



PARAMETER 


ENTRY (E22) 


RETURN (R14) 


COMMENT 


ELEMENT 


ADDRESS 


Register 


A 


XX 


?? 


— 


Register 


B 


XX 


00 


— 


Register 


C 


XX 


00 


— 


Register 


F 


XX 


?? 


— 



NOTES 

1. For registers not shown, entry contents are not used and remain unaltered at exit. 

2. XX means no specific data required at entry, but entry contents will be lost. 

3. ?? means contents are unknown or meaningless. 

Figure 4-54. Register and Memory Allocation for 7303 Subroutine (DEBOUNCE. DELAY). 



SYMBOL 


SUBROUTINE 
PARAMETER 


RETURN (fm) 


UNITS 


COMMENTS 


MIN 


MAX 


Ns 


Stack 
memory 


2 


Bytes 


— 


Np 


Program 
memory 


18 


Bytes 


— 


Npt 


Total program 
memory 


18 


Bytes 


— 


Nr 


RAM memory 





Bytes 


— 


Te 


Execution 8085 


27 + 24N 


Time states 


N = Loop count in 
B,C pair 


time Z80 


27 + 24N 



o 



Figure 4-55. Characteristics of 7303 Subroutine (DEBOUNCE.DELAY). 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



o 



4-42 



Demonstration/Test Program: DISPLAY.DEMO 



Starting Address: 1 1 00 



This program demonstrates a technique for displaying a long message on a display with a limited number of 
positions, then performs a lamp test. It repeats the message "PRO-LOG 7303" twice, turns on all LED 
segments, then repeats. See Fig. 4-56. for flowchart. 

Requires no initialization except setting the stack pointer. 



NOTE 
This is an endless loop demonstration program— not a subroutine. 



© 



f DISPLAY.DEMO J 








1100 






SET TO RUN 
BILLBOARD TWICE 




1102 






SAVE MESSAGE 

START ADDRESS 

IN RAM 












1108 


4 






RUN FULL 

BILLBOARD 

MESSAGE ONCE 




Fig. 4-40 


1103 








DECREMENT 
COUNT 




110C/^\ 
<^ =0? ^> 

|YES 
110F | 


NO 








TURN ON ALL 
DISPLAY LEDS 
+ SEGMENTS 




® 

Fig. 4-26 


1112 






DELAY 
N = 625 ms 




Fig. 4-52 


1115 






CLEAR THE 
DISPLAY 




® 

Fig. 4-22 











Figure 4-56. Flowchart— DISPLAY.DEMO Demonstration/Test Program for the 7303. 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-43 



Demonstration/Test Program: DISPLAY.SELF 



Starting Address: 11 1 B 



Displays address/data for every location in memory page 10, which is where the software package's display 
subroutines are stored. Shows full hexadecimal address (1000-10FF) and hexadecimal data stored at each 
address, then repeats. See Fig. 4-57 for flowchart. 



NOTE 
This is an endless loop demonstration program— not a subroutine. 



o 





f DISPLAY.SELF J 








111B 








CLEAR THE 
DISPLAY 




^-^Fig. 4-20 




111E 










SET POINTER 

TO START AT 

(MEM.DISP) 

SUBROUTINE 












1121 








DISPLAY 
CURRENT 
MEMORY 
ADDRESS 






^-^Fig. 4-35 


102D 








DISPLAY 
CURRENT 
MEMORY 

DATA 




e 

^Fig. 4-35 


1133 








WAIT APPROX. 
0.6 s 




Fig. 4-52 




1136 










INCREMENT 
MEMORY 
ADDRESS 
POINTER 




YES 


1137/^ 

*<Tendof 


■ PAGE?> 


A 






o 



Figure 4-57. Flowchart— -DISPLAY.SELF Demonstration/Test Program for the 7303. 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



4-44 



o 



Demonstration/Test Program: CALCULATOR 



Starting Address: 11 CO 



This program reads keystrokes and shifts them across the display, right to left, in the manner of a calculator. 
The program demonstrates the modular technique of changing display format by manipulating memory rather 
than rewriting the display routine each time for each new format. The same display subroutine, (MESSAGE), 
displays the same portion of RAM memory each time, but the memory data is changed each time prior to 
display. See Fig. 4-58 for flowchart. 



NOTE 
This is an endless loop demonstration program— not a subroutine. 



O 





f CALCULATOR J 




11C0 










SET TO CLEAR 

DISPLAY BY 

LOADING KEY 

INPUT BUFFER 

(IN RAM) WITH 

"SPACE" CHARS. 














11CC 








DISPLAY 

CONTENT OF 

KEY INPUT 

BUFFER 


© 

^-Tig. 4-38 




11 D2 








READ A KEY 

FROM 
KEYBOARD 


© 

Vfc -^Fig. 4-43 




11D5^^ 
.^XL 

<T DISP 
^^KE 

NO 
11DA 


LJrrV ES 




:y?^^ 






CONVERT 

KEY'S VALUE 

TO ASCII 


© 

^Fig. 4-29 






11DD 








SHIFT NEW KEY 
INTO KEY INPUT 
BUFFER AS NEW 
LSD; FORMER MSD 
IS SHIFTED OUT 
AND LOST 















Figure 4-58. Flowchart— CALCULATOR Demonstration/Test Program for the 7303. 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-45 



Demonstration/Test Program: D1SPLAYTEST 



Starting Address: 1140 



This program allows operator testing of the displays by observing each display position as the program cycles 
all eight displays through every ASCII character (Fig. 3-3) that can be displayed by the 7303. See Fig. 4-59 for 
flowchart. 



NOTE 
This is an endless loop demonstration program— not a subroutine. 



o 



UDISPLAYTESTU 



PRESET DATA 
COUNTER TO 
"SPACE" CHAR 



1043 



DISPLAY 

CURRENT ASCII 

CHAR IN ALL 

8 POSITIONS 



1046 



WAIT 
600 ms 



1049 




Fig. 4-35 



<«> 



fE21 

^-^Fig. 4-52 



YES 



O 



Figure 4-59. Flowchart— DISPLAY.TEST Demonstration/Test Program for the 7303. 



( ) Denotes subroutine label 

Low level active 
E/R Entry/return path identifier encircled 



o 



4-46 



Demonstration/Test Program: KEY.TEST 



Starting Address: 1 1 FO 



This program allows an operator to test the 7303's keyboard, by observing that the key value (as labeled on the 
keys when the card is shipped) appears in the display each time one of the keys is pressed. It does not apply to 
the RESET key, which resets the system processor (Section 3). See Fig. 4-60 for flowchart. 



NOTE 
This is an endless loop demonstration program— not a subroutine. 



O 



1 


f KEY.TEST ) 




1F0 






CLEAR 
DISPLAY 


Fig. 4-22 






10F3 






WAIT FOR KEY 
TO BE PRESSED 


e 

Fig. 4-43 




11F6 








DISPLAY KEY'S 

HEX VALUE IN 

POSITIONS 1 & 













Figure 4-60. Flowchart— KEY.TEST Demonstration/Test Program for the 7303. 



( ) Denotes subroutine label 
* Low level active 
E/R Entry/return path identifier encircled 



4-47 



o 



o 



4-48 



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6 


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7 


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8 


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A 


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B 


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C 


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V 




D 


7ft 




LDft 


B 


r out Put cursor bit p*tterm 




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PRft 




F6R PO&moKS ASUl TO LEFT 




F 


OF 




RRfc 




SIDE OF D\SPLttY J 


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7 


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4-51 









PRO-LOG CORPORATION 


PROGRAM ASSEMBLY FORM 


HEXADECIW 


AL 


MNEMONIC 


TITLE DATE 


PAGE 
,ADR 


ADR 


INSTR. 


LABEL 


INSTR. 


MODIFIER 


COMMENTS 


iO 


Co 


Of) 




OCR 




"* nEdREm^UT BYTE COUNTER 




1 


C2, 




,TP 


*o 






2 


PB 






Lr^Em/Ascir) 






3 


IO 












4 


C«J 




RTS 




*r 




5 














6 














C7 


CD 


(D\SP-WEX) 


TS 




T ^CUnIERT ME* TO ^SCTL 




6 


<=>D 






iHE*/fcSCItt 


| 




9 


IO 








i 




A 


c?, 




TP 




T msPLftt fcscic CtfPifc&cTFR 




B 


o\ 






( D\SPLW , > 






C 


IO 






■ 


1 




D 














Ce 


79 


(DlSP^rt-O 


LD A 


c 


"" V^LftTfc fcNb RA&HT-MiXOST 




F 


&& 




ANftl 




PATS A<Z t <oJ 


ie> 


D o 


FO 






FO 






1 


OF 




RR* 








2 


OF 




RRft 








3 


OF 




RR* 








4 


OF 




RRft 




< r 




5 


CD 




Tfi 




■- msPLfW v\ex 




6 


C7 






fDKPHEX) 






7 


IO 








i » 




8 


05 




DCR 




"" D6C^ew\eut msPiftv PosmfcN address 




9 


7<? 




LDP 


c. 






A 


E(o 




l\KM 




\*>OLfcTE feVTS ^,^3 




B 


OF 






6F 


if 




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TP 




T DISPLAY HEX 




D 


a 






(D\SP- HE*) 






E 


IO 








<r 




F 












10 


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^DKPLfcY DELfiY) 


L.&BT. 




T \ oRD TM:S?UVY LOOP COOisLT 




1 


80 






^ 3\5 ms 






2 


C3 




?TP 








3 


K, 






Pfc\)SE_ 






4 


ID 








* 




&5 


0<6> 


te&omcEbftstf 


LLbBI_ 




T LOftD DELPtf LOOP COOKVT 




6 


OR 






^ ao nns 






7 


C3 




TP 








8 








PfcUSE 






9 


10 








" 




E* 


0<i> 


( LONG OBJVtO 


LDBX 




T LOPlD LGH& DELftV LOOP COOHT" 




B 


FF 






^&2l5 ms 


w 




Ec 


OB 


PftUSE. 


DCP 


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fc ' 


T Y)ELftY COUNT -<A ? 




E 


Bl 




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c 






F 


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10 


F° 


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PfcOSE 






1 


to 






_~ 






2 


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RTS 




u 




F3 


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(LPMPTEST) 


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4 


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bLLCURf^RS 


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5 


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TS 




T DISPLAY ALL CURSORS 




6 


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9 


FF 






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OUTPUT BCT PftTTERM TO 




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4-52 



© 









PRO-LOG CORPORATION 


PROGRAM ASSEMBLY FORM 


HEXADECIMAL 


MNEMONIC 


TITLE DATE 


_„ A DR 


..ADR 


INSTR. 


LABEL 


INSTR. 


MODIFIER 


COMMENTS 


II 


o° 


IE 


tlSPLftY DEma 


LDEX 




T 5ET TO ROM BILLBOARD T\NlCE_ 




1 


02. 






COON4T2. 






2 


2\ 




LDPT 


U,L 


< t 




3 


(nO 






DErf\0.|t\E^Pl6EL 


T LrtRb mES^ft^E <TfcRT fckbfcESS IK 




4 


\C) 








RMT» 




5 


?,?> 




^TPD 


U,L 






6 


oo 






TENLTSTftRV 






7 


?. I 






Rftfla 


ir 




O* 


rD 


DElAO LnftP 


T^ 




T RUM FULL P>lLLW)?\Rt> MESSAGE rtNCE 




9 


39 






(fc\LLP>ORR{y) 






A 


IO 








^ 




B 


ID 




HCE 




T DFcR^mFMT LOOP COUNTER 




C 


C2. 




TP 


20 


T i=OOPM_ Trt l*ERO? 




D 


Oft 






DEffcfc L06P 






E 


tl 








\ * 




F 


CD 




TS 




T \ES- TURU 6U *LV_ DisPLfW <*E&(fcEKtS 


II 


I o 


F3 






C Lfcrctf test) 






1 


IO 








i' 




2 


r.D 




TS 




T PftU<>E <bZ£- rmuuseeoUDS 




3 


E* 






(lAU6 fcEUVlO 






4 


IO 








u 




5 


CD 




T^ 




T" clenr th-e display 




6 


IA 






[aE&R BOTH) 






7 


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8 


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T REPEAT* 




9 


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DISPLAY DEttto 






A 


II 








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CD 


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c 


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fCLE&R &CTU) 






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e 


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POSITION 7 






4 


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7 


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9 


05 






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(LINE kbbRESS KO-M") 




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D 


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LbCM 


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F 


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1 


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[w^aiw-O 






2 


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3 


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4 


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6 


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r iMCRENNFUT CORRECT MVEMORY fc&DRBS 




7 


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8 


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9 


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oo 






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4-53 









PRO-LOG CORPORATION 


PROGRAM ASSEMBLY FORM 


HEXADECIM 


AL 


MNEMONIC 


TITLE DATE 


PAGE 
ADR 


LINt 
ADR 


INSTR. 


LABEL 


INSTR. 


MODIFIER 


COMMENTS 


II 


40 


IF 


tMSPLKYTEST 


LDET 




T~ PRESET hSOL fcfcTfc cauMTER TO 




1 


AO 






KSOL^SPfctE" 


i SP^CE CHARACTER 




T* 


7B 


TE6T LtoP 


LOfc 


E 


T~ DISPLAY dURfcEMT tecTL CHJ\R.f^TER 




3 


CI> 




JTS 




1 IU M-L. EL6HT PA^lTtnMS 




4 


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:t>\SPLPvY8^ 






5 


IO 








1 




6 


<"T> 




\T£ 




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7 


EA 






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8 


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1 




9 


7B 




U>& 


El 


T~ \N<1RFN\£NT *SOlX DftTfc GDONTER 




A 


IC. 




iC^ 




1 




B 


FF 




CPP\T 




r VPkUO K<XTL CU&RIKXER? 




C 


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*SOL % lllfl£WMK' 






D 


ca, 




CVP 


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42 






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1 CA^ 




F 


u 








Jr 


w 


S"° 


C3 




JP 




T NO -START OVER 




1 


AC) 






Dl5PU\YTEST 






2 


II 








L> 




3 














4 














,5" s 


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£rem> KEy} 


TS 




T NUY KEY CL6<,Eb? 




6 


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7 


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tU6TP-Tttt<> <SEG>UEM<1^ EM SUftES THNT 




8 


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Z.O 


A PREVIOUSLY bF<^bFD KEY HfcS SEEU 




9 


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r KEN& KEN 1 ) 


RELEASED BEFORE SEMSIMG * NEW KEY) 




A 


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B 


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C 


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11 


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■■ 






(NATE- DUPLAtfYTED SCAN" 




1 


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SEQDCNCE RESETS VIAISE^) 




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T- MCV RcVCRTE J\ SIMPLE &VT fSCROSS 




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78 


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7 


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8 


Al 




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9 


FF 




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A 


In 






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B 


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C 


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fl» ADE KEY) 






D 


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11 




E 


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-r amy vc^v cv.e>-~j=X>? 




F 


DO 






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11 


7 ° 


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1 


DO 






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2 






AW*T 








3 


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/\\ L R(y*lS 






4 


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JP 


zr 






5 


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DECODE LOO? 






6 


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7 


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LOC 


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t- VES-f,^\/E \T^ aawvc^Lumu 




8 


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1 r ^ftR T> 1Y4 KTE.S Fr>^ DE60D\U<S L^TER. 




9 


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hNfcT 







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4-54 



o 



o 









PRO-LOG 


CORPORA 


DON 


PROGRAM ASSEMBLY FORM 


HEXADECIMAL 


MNEMONIC 


riTLE DATE 


PAGE 
, ADR_._ 


ADR 


INSTR. 


LABEL 


INSTR. 


MODIFIER 


COMMENTS 


u 


80 


3F 






ALL ROWS 






1 


3$ 




CPR 


C 


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2 






.TP 


"2:0 


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3 


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4 


II 








if 




5 


79 




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c 


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6 


OE 




1DCH 




ONE flFk lNP>UT PORT felTS TO OWE. 




7 


OO 






OO 


OF to HEX MumftERs.* 




88 


IF 


FIND RAW 


RfchC 




no, 01 oz,o^o4 y ar o.<r 




9 


J>* 




TP 


CI 






A 


<*> 






'MNEfcT ROM 






B 


II 












C 


oc 




ICC 








D 


C.?i 




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8R 






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F 


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^ 


II 


9 


79 


touvieRT RfcNK/ 


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T^nr>ULT\PLV RA\M rAGRtANPstE BV 4 TO 




1 


07 




RLfc 




PRf>bUCE HEX oo ; OA f Oft OC \A ; t4 




2 


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RLPv 








3 


4F 




LDC 


A 


<f 




4 


78 




LDK 


ft 


-i" dowyeRT coluknM c^oRtuM IVTE PRom 




5 


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ONE OF WUR OUTPOT PORT &\T$ TO 




6 


00 






do 


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81 




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47 




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3 














4 














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9 


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-!■ . ... __■ . 




F 


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ANKT 




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R 


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1 


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py.ir z=n \F ANY K^S \S CLOSED 




2 










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4-55 









PRO-LOG CORPORATION 


PROGRAM ASSEMBLY FORM 


HEXADECIMAL 


MNEMONIC 


riTLE DATE 


PAGE 
ADR 


ADR 


INSTR. 


LABEL 


INSTR. 


MODIFIER 


COMMENTS 


\\ 


Co 


z\ 


CftL^ULPTOK 


LDPL 


HA 


j SET TH CLEAR TttE. b\SPLAY EW EILIJM6 




1 


O?. 






KEY' &0FFER 


THE KEY-mPrtT RllFFF r R flM RACiV> 




2 


?\ 






Rf\rr» 


N/sMTH fcSCTL "'SPACE" CUAfcfcCTEfc5> 




3 


Ok> 




LPRI 








4 


OR 






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Cs 


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ERteF LOfiP 


LliffiL 








6 


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fcsaE^SPfcCE" 






7 


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8 


05 




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9 


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A 


05 






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B 


II 








1' 




Cc 


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4-56 



SECTION 5 
Maintenance 



Reference Drawings 

The schematic (Fig. 5-1 ) and assembly drawing (Fig. 5-2) in the following pages are included in this manual 
FOR REFERENCE USE ONLY. They may differ in some respects f.'om the card and documentation that the 
user receives from Pro-Log. 

The schematic and the assembly drawing shipped by Pro-Log with the card are those from which the card was 
manufactured. 



O 



5-1 



CJl 

I 




Figure 5-1. Schematic for 7303 (reference only) 





ca 



KEVISIONI 



DELETE ROBBER 3AD SPACERS. ,1 
MARK KTtS ASM-MS,ftR478. fV 
*DDSECTil)mC-C. 



REK5ED PER PCM Ofl9S 



REVISED PER PCN IfES 



<?* 



CJ 



A 



*j_ Al _^_ _j)£ 4)4. j,'^_ 1)1 jj^ ij\ 



% ®* L * 



7 6 5 4 ! 3 2 1 Oi | 



®.®®®®®®® ipzn 

g» CH7 cm ens cm a» an cm Ujuuuh M «3 





14 

K21 




15 

KM 




16 

K23 




17 

K24 




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c 




D 

KM 




E 

K1S 




F 

KM 




13 

HO 




























8 




9 

KM 




A 

in 




B 

K13 




12 




























4 

K5 




5 

K6 




6 

KT 




7 

Kt 




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Kt 




1 

K2 




2 

K) 




3 

K4 




10 

KI7 






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A [CTft tOKTACT) 



>M[ttJ K/\/ 



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• 


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» 


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K2B • 
MA • 



HZ36 
KZZA 

KISS 
R13B 
*«-A 



SECTION C-C 
CIRC SIDE OF KEYBOARO 



^ USE rKD-uOG JIG AF70007 TO FIX HEIGHT OF KEY BOARD. 

<& INSTALL SPACERS PMOR TO SOLDERING SWITCHES. 

^IDENTIFV WITH ASSEMBLY REV LETTER [/SIN 6 RUBBER STA»P. 

a REFERENCE WSl&NATIONS ARE FOR LOCATING PURPOSES 
ONLY AND MAY NOT APPEAR OK ACTUA. PART. 

7 Do Not immerse card in solvent. 

^ APPLY LOCKTITE TO SCREWS & PLCS'). 

Amount keyboard with lettering on ciftc. side vpsioe-down. 

A BREAK OFF DOTTED AREA OF TAB. 
A CAW> MAPPED TO PORTS 00 AND 0.1. 
A DENOTES HH I END OF tC'S. 
I. BOARD TO CONFORM WITH ASS* STANDARD A5I004 . 
NOTES: UNLESS OTHERWISE SPECIFIED. 



REFERENCE 



SCHEMATIC 104973 
PARTS LIST (04375 



(4 I4.7K NETWORK 



9 IO.I„F 50V 



ITEM[ DESCRIPTION 



C2 .3 .4 .5.6. 7. 8. 9 



REF. DESIGWATIOW 



PRO-LOG CORPORATION 



S.MARULLO 2I4-79 



G.PAPPE 2-21-73 



ASSEMBLY . 7301 
KEYBOARD DISPLAY 
CARD 



D 104974 



mo 



i 



ai 

i 

CO 



Figure 5-2. Assembly for 7303 (reference only). 



Signal Glossary 

See Figs. 5-3 and 5-4. 



MNEMONIC 


MEANING 


PIN(S) 


DESCRIPTION 


FUNCTION 


D0-D7 


Data bus 


7-14 


High-active 


8-bit, 3-state bidirectional data bus. 


A0-A7 


Address bus 


15, 17, 19 

21,23,25 

27, 29 


High-active 


Low-order 8 bits of address bus, used for 
I/O port addressing. 7303 responds to ports 
DO, D1 as shipped. 


SYSRESET* 


System 
reset 


47 


Low-active 


Originates at processor card in response to 
power-on or PBRESET*. 


PBRESET* 


Pushbutton 
reset 


48 


Low-active 
switch closure 


Drives processor card's PBRESET* input. 


IOEXP 


I/O port 
expansion 


35 


High-active 


Bank select; must be low for 7303; grounded 
by 7801, 7802, 7803 processor cards. 


IORQ* 


I/O request 


33 


Low-active 


Indicates that the address bus has a valid 
port address on A0-A7. 


RD* 


Read 


32 


Low-active 


Indicates that the processor is reading from 
the addressed input port. 


WR* 


Write 


31 


Low-active 


Indicates that the processor is writing to the 
addressed output port. 


PCI 
PCO 


Priority 
chain 


52 
51 


High-active 


Card level serial interrupt priority; trace 
maintains continuity on 7303. 



Figure 5-3. STD BUS Edge Connector Signals for the 7303 

(see also STD BUS pin list, Fig. 2-7). 
Note: Unused pins are open; pads are provided on some unused pins for user signals. 



MNEMONIC 


MEANING 


DESCRIPTION 


COMMENTS 


A0, A1 


Display digit address 


High-active 


Selects one of four digits in each half of the 
display. 


A2, A2* 


Display chip select 


Low-active 


Selects the left-hand four digits (A2 = 1) or 
the right-hand four digits of the display 
(A2 = 0). 


ID0*-ID7* 


Input port bits 


Low-active 


ID0* - IDS* are used to read key closures 

from the keypad matrix. 

ID6* is used to read the state of rocker 

switch S1. 

ID7* is used to read the state of rocker 

switch S2. 


ISO* 


Input port select 


Low-active 


Decoder output used to read input port DO. 


b0-b7 


Output latch bit 


High-active 


b0-b6 are used as the ASCII character 
bus to the display digits. 
b7 selects cursor mode when low, char- 
acter mode when high. 


b0*-b3* 


Output latch bit 


Low-active 


Used to strobe the keypad for key reading/ 
decoding operations. 


OS0*, OS1* 


Output select 


Rising edge 


Used to latch data bus data to output ports., 
(DO, D1 as shipped.) 


RST* 


Reset 


Low-active 


Buffered SYSRESET* used to reset the out- 
put ports and the binary LED display. 



Figure 5-4. Internal 7303 Signals. 



5-4 



Keyboard Label Replacement 

To change a keyboard label, grasp the clear keyswitch cover at the top and bottom edges with the fingernails of 
your thumb and index or middle finger, then pull directly out and away from the keyboard. The clear plastic 
cover will snap free from the keyswitch, exposing the legend area below. The legend may then be replaced or 
covered over by a new legend such as those legends provided by Pro-Log or appropriate sized legends 
provided by the customer. Replace the clear plastic cover on the keyswitch. 



WARNING 

Do not expose the 7303 keyboard to fluxes, solvents, cleaning solutions, or their fumes. 



O 



Keyboard Disassembly 

To replace an individual key, take out the eight slotted screws located underneath the keyboard. Holes in the 
circuit card provide access to these screws from the card's rear. When the screws are removed, the keycaps fall 
free with the cover for easy removal. When re-assembling the keyboard, use a mechanical screw starter. 

Special Parts 

The following parts (Fig. 5-5) may not be readily identifiable by markings on the parts themselves. Should the 
user desire to obtain these parts from local sources other than Pro-Log, the following information is given 
concerning their manufacture: 



PART 


PRO-LOG 
PART NUMBER 


MANUFACTURER 


MANUFACTURER'S 
PART NUMBER 


Alphanumeric 
Display 


902085 


LITRONIX 


DL-1416 


Keyboard 


902084 


K. B. DENVER 


MOD 25-01-02-00 


Rocker Switch 


901359 


C&K COMPONENTS 

or 
JBT SUBMINIATURE SWITCH 


7810 
MT77 



Please note that replacement of parts by the customer may VOID THE PRO-LOG WARRANTY. Pro-Log 
assumes no responsibility for the continued availability of these parts. 

Figure 5-5. Special Parts for 7303. 



5-5 



Return for Repair Procedures 

Domestic Customers: \J 

1. Call our factory direct at (408) 372-4593, and ask for CUSTOMER SERVICE. 

2. Explain the problem and we may be able to solve it on the phone. If not, we will give you a Customer Return 
Order (CRO) number. 

Mark the CRO number on the shipping label, packing slip, and other paperwork accompanying the return. 
We cannot accept returns without a CRO. 

3. Please be sure to enclose a packing slip with CRO number, serial number of the equipment, if applicable, 
reason for return, and the name and telephone number of the person we should contact (preferably the 
user), if we have any further questions. 

4. Package the equipment in a solid cardboard box secured with packing material. 

CAUTION: Loose MOS integrated circuits, or any product containing CMOS integrated circuits, must be 
protected from electrostatic discharge during shipment. Use conductive foam pads or conductive plastic 
bags, and never place MOS or CMOS circuitry in contact with Styrofoam materials. 

5. Ship prepaid and insured to: 

Pro-Log Corporation 
2411 Garden Road 
Monterey, California 93940 

Reference CRO # . 

International Customers: 

Equipment repair is handled by your local Pro-Log Distributor. If you need to contact Pro-Log, the factory can 
be reached at any time by TWX at 910-3.60-7082. 

O 

Limited Warranty: Seller warrants that the articles furnished hereunder are free from defects in material and ^-^ 

workmanship and perform to applicable, published Pro-Log specifications for one year from date of shipment. 
This warranty is in lieu of any other warranty expressed or implied. In no event will Seller be liable for special or 
consequential damages as a result of any alleged breach of this warranty provision. The liability of Seller 
hereunder shall be limited to replacing or repairing, at its option, any defective units which are returned F.O.B. 
Seller's plant. Equipment or parts which have been subject to abuse, misuse, accident, alteration, neglect, 
unauthorized repair or installation are not covered by warranty. Seller shall have the right of final deter- 
mination as to the existence and cause of defect. As to items repaired or replaced, the warranty shall continue 
in effect for the remainder of the warranty period, or for ninety (90) days following date of shipment by Seller or 
the repaired or replaced part whichever period is longer. No liability is assumed for expendable items such as 
lamps and fuses. No warranty is made with respect to custom equipment or products produced to Buyer's 
specifications except as specifically stated in writing by Seller and contained in the contract. 



o 



5-6 



APPENDIX A 
Front Panel Mounting of 7303 Card 

PLAN 131 



o 



A-1 



n i i i im iiiii i i' M i i>i iii|i i i p iiiiiiiiii i i i iiiii w !i . " 



Introduction 

The 7303 is designed as a direct interface to the STD BUS. If you mount the 7303 outside the STD BUS card 
rack, do not connect it directly to the STD BUS through a long cable. Such a connection increases backplane 
capacitance and cross coupling, and results in excessive crosstalk, noise, and generally degraded perfor- 
mance. 

Instead, connect the 7303 to the end of I/O port lines. This type of connection (Fig. A-1 ) requires more program 
involvement, but it avoids the problems associated with transmitting fast processor signals over a long cable. 
In this mode, a TTL I/O card with 3-state I/O lines provides the signals needed to control the 7303 in place of 
the direct STD BUS drive. The program generates these signals by executing short instruction sequences 
instead of the single read and write instructions used in I/O mapped operation. 



o 



7605 TTL I/O Card 
or 

7507 I/O Module Mounting 
Rack Interface Card 



Ribbon Cable 
(up to 6 feet) 



7303 Keyboard/Display Card 
(remote-panel mounted) 




©QQOQQ ©© 

□□□□□ 
□□□□□ 
□□□□□ 
nnnnn 

DDDDD 



Tl 



Figure A-1. Cable Connection when Operating the 7303 as an I/O Load. 



Remote 7303 Drive Via I/O Lines 

When driving the 7303 via I/O lines, the 7303's address decoder circuitry is not used, since the program, 
instead of the usual hardware, controls card selection. Only address line A0 is retained to select between the 
two sequential port addresses on the 7303. In addition, the IORQ* and IOEXP lines are not used, since the RD* 
and WR* signals alone can maintain full card control. 

Using either Pro-Log's 7507 module mounting rack interface, 7605 general purpose TTL I/O card, or equiva- 
lent I/O card with bidirectional I/O capability, connect the 7303's edge connector as follows: 

1. Ground address lines A1 throu A7 (edge connector pins 15, 17, 19, 21, 23, 25, 27, to pins 3, 4); 
move address jumpers to X0, Y0, Z0, and Z1 . 

2. Ground IORQ* and IOEXP (edge connector pins 33 and 35 to pins 3, 4). 

3. Connect a 3-state I/O port (8 lines) to the 7303's data bus d0-d7 (edge connector pins 13, 11,9, 
7, 14, 12, 10, 8), maintaining one-to-one bit significance for programming convenience. 

4. Connect four output-only lines to the 7303's A0, RD*, WR*, and SYSRESET* lines (edge 
connector pins 29, 32, 31 , and 47, respectively) . Note that these lines are always outputs from the 
3-state I/O card and must remain driven at all times for correct 7303 operation. Do not allow 
these lines to float unless pull-up resistors are connected. 



o 



NOTE 
In steps 3 and 4 above, the interface cable to the 7303 should consist of ribbon cable with 
alternating ground-signal-ground, or multiple twisted pairs consisting of signal/ground in each 
pair. Limit cable length to 6 feet (2 meters). 



5. Connect +5V ±5% and logic ground to edge connector pins 1, 2, and 3, 4, respectively, via a 
twisted pair of 18-gauge wires or larger. 

6. (Optional). If the 7303's reset pushbutton is to be functional, connect the card's pin 48 to STD 
BUS trace pin 48. 



o 



A-2 



To program the 7303 as an I/O load, substitute instruction sequences for the single read/write instructions 
normally used. These sequences are as follows: 



WRITE Sequence 



READ Sequence 



Select A0 = or 1 (select the 7303's data or control output ports). 

Write output data to dO through d7 at the 7303. 

Set WR* = 0. 

Set WR* = 1. 

Float the data bus drivers. 

Set A0 = (select the 7303's input port). 
Set RD* = 0. 

Read the input data from 7303's dO through d7. 
Set RD* = 1. 



o 



Panel Mounting 

The recommended cutouts for mounting the 7303 in a panel are detailed in Fig. A-2. Mount the 7303 in panel 
stock of up to 0.125-in. thickness, using the four mounting holes provided on the card. The display bezel is 
recessed approximately 0.375 in. below the keycaps and binary LEDs. This recessing allows for beveling 
around the display cutout, while the keys and LEDs protrude from the panel front (Fig. A-3). 



213 in. dia. - 8 Pics. 




4.252 



CUTOUT DETAIL A 



• 125 -^ fcoc^ 



-4.343- 



T 



4.242 



-*= 



\ 



\ 



/ 



/ 



/ 



OPEN 

/ \ 

/ \ 

/ \ 

/ \ 

/ \ 

/ \ 

' \ 



CUTOUT DETAIL B 



Figure A-2. Cutout Details of 7303 Panel-Mounting (dimensions in inches). 



A-3 



BWMW^H i OTWWIIMMMMWIMi 



i wu m wrmmwmwmt m i uju i i |ij i i w 'i m i iph 



4 1.145" 



o 



4.562" 



PWB 



I 






, 



a /ALPHANUMERIC 
DISPLAY 



: ' Dl 



<M 



BINARY LED 
DISPLAY 






KEYBOARD 



i 



.950" 



"1/8" PANEL 
PANEL THICKNESS 
0.125 in. 
0.318 cm. 



o 



Figure A-3. Profile Mounting of 7303 in User's 1/8-in. Panel. 



o 



A-4 



'OlllliiilVNeAL-: 



o 



m PRO-LOG 

UcJ CORPORATION 



2411 Garden Road 
Monterey, California 93940 
Telephone: (408) 372-4593 

TWX: 910-360-7082 



105999C 4/81